Date: Tue, 31 May 2022 15:42:07 GMT From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 4b1174e27a30 - main - llvm MIPS target: add missed source file Message-ID: <202205311542.24VFg7dZ099260@gitrepo.freebsd.org>
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The branch main has been updated by dim: URL: https://cgit.FreeBSD.org/src/commit/?id=4b1174e27a30f9a627586c5d45e10ba7e801d3bd commit 4b1174e27a30f9a627586c5d45e10ba7e801d3bd Author: Dimitry Andric <dim@FreeBSD.org> AuthorDate: 2022-05-31 13:19:55 +0000 Commit: Dimitry Andric <dim@FreeBSD.org> CommitDate: 2022-05-31 15:41:51 +0000 llvm MIPS target: add missed source file Otherwise, linking llvm binaries with this target enabled (which is not the default) will fail with a number of undefined symbol errors: ld: error: undefined symbol: llvm::initializeMipsMulMulBugFixPass(llvm::PassRegistry&) ld: error: undefined symbol: llvm::createMipsMulMulBugPass() MFC after: 3 days --- lib/clang/libllvm/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/clang/libllvm/Makefile b/lib/clang/libllvm/Makefile index 52216847685a..868f9aa48964 100644 --- a/lib/clang/libllvm/Makefile +++ b/lib/clang/libllvm/Makefile @@ -1301,6 +1301,7 @@ SRCS_MIN+= Target/Mips/MipsLegalizerInfo.cpp SRCS_MIN+= Target/Mips/MipsMCInstLower.cpp SRCS_MIN+= Target/Mips/MipsMachineFunction.cpp SRCS_MIN+= Target/Mips/MipsModuleISelDAGToDAG.cpp +SRCS_MIN+= Target/Mips/MipsMulMulBugPass.cpp SRCS_MIN+= Target/Mips/MipsOptimizePICCall.cpp SRCS_MIN+= Target/Mips/MipsOs16.cpp SRCS_MIN+= Target/Mips/MipsPreLegalizerCombiner.cpp
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