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Date:      Wed, 5 Jun 2013 00:39:20 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r251399 - head/sys/dev/ath/ath_hal
Message-ID:  <201306050039.r550dKKY048801@svn.freebsd.org>

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Author: adrian
Date: Wed Jun  5 00:39:20 2013
New Revision: 251399
URL: http://svnweb.freebsd.org/changeset/base/251399

Log:
  Document the AR9285/AR9485 LNA configuration information that's
  stored in the ctl/ext RSSI field for chain 2.
  
  Tested:
  
  * AR9285, STA

Modified:
  head/sys/dev/ath/ath_hal/ah_desc.h

Modified: head/sys/dev/ath/ath_hal/ah_desc.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah_desc.h	Tue Jun  4 23:52:57 2013	(r251398)
+++ head/sys/dev/ath/ath_hal/ah_desc.h	Wed Jun  5 00:39:20 2013	(r251399)
@@ -157,6 +157,32 @@ struct ath_rx_status {
 #define	HAL_RX_IS_APSD		0x0100	/* Is ASPD trigger frame */
 #define	HAL_RX_STBC		0x0200	/* Is an STBC frame */
 
+/*
+ * This is the format of RSSI[2] on the AR9285/AR9485.
+ * It encodes the LNA configuration information.
+ *
+ * For boards with an external diversity antenna switch,
+ * HAL_RX_LNA_EXTCFG encodes which configuration was
+ * used (antenna 1 or antenna 2.)  This feeds into the
+ * switch table and ensures that the given antenna was
+ * connected to an LNA.
+ */
+#define	HAL_RX_LNA_LNACFG	0x80	/* 1 = main LNA config used, 0 = ALT */
+#define	HAL_RX_LNA_EXTCFG	0x40	/* 0 = external diversity ant1, 1 = ant2 */
+#define	HAL_RX_LNA_CFG_USED	0x30	/* 2 bits; LNA config used on RX */
+#define	HAL_RX_LNA_CFG_USED_S		4
+#define	HAL_RX_LNA_CFG_MAIN	0x0c	/* 2 bits; "Main" LNA config */
+#define	HAL_RX_LNA_CFG_ALT	0x02	/* 2 bits; "Alt" LNA config */
+
+/*
+ * This is the format of RSSI_EXT[2] on the AR9285/AR9485.
+ * It encodes the switch table configuration and fast diversity
+ * value.
+ */
+#define	HAL_RX_LNA_FASTDIV	0x40	/* 1 = fast diversity measurement done */
+#define	HAL_RX_LNA_SWITCH_0	0x30	/* 2 bits; sw_0[1:0] */
+#define	HAL_RX_LNA_SWITCH_COM	0x0f	/* 4 bits, sw_com[3:0] */
+
 enum {
 	HAL_PHYERR_UNDERRUN		= 0,	/* Transmit underrun */
 	HAL_PHYERR_TIMING		= 1,	/* Timing error */



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