Date: Fri, 3 Jun 2022 02:57:05 GMT From: Alexander Motin <mav@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 1326017849ee - main - hwpmc: Add IDs for few more Intel Atom CPUs. Message-ID: <202206030257.2532v524086827@gitrepo.freebsd.org>
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The branch main has been updated by mav: URL: https://cgit.FreeBSD.org/src/commit/?id=1326017849ee0536e415d69f150514d410b588ff commit 1326017849ee0536e415d69f150514d410b588ff Author: Alexander Motin <mav@FreeBSD.org> AuthorDate: 2022-06-03 02:55:42 +0000 Commit: Alexander Motin <mav@FreeBSD.org> CommitDate: 2022-06-03 02:55:42 +0000 hwpmc: Add IDs for few more Intel Atom CPUs. MFC after: 1 month --- sys/dev/hwpmc/hwpmc_core.c | 2 ++ sys/dev/hwpmc/hwpmc_intel.c | 21 +++++++++++++++++---- sys/sys/pmc.h | 2 ++ 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index 5d6ca02ea792..8575abdea214 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -777,6 +777,8 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, case PMC_CPU_INTEL_ATOM: case PMC_CPU_INTEL_ATOM_SILVERMONT: case PMC_CPU_INTEL_ATOM_GOLDMONT: + case PMC_CPU_INTEL_ATOM_GOLDMONT_P: + case PMC_CPU_INTEL_ATOM_TREMONT: case PMC_CPU_INTEL_SKYLAKE: case PMC_CPU_INTEL_SKYLAKE_XEON: case PMC_CPU_INTEL_ICELAKE: diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index f59b7b41ece9..894f9c07b622 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -118,10 +118,6 @@ pmc_intel_initialize(void) cputype = PMC_CPU_INTEL_CORE2EXTREME; nclasses = 3; break; - case 0x1C: /* Per Intel document 320047-002. */ - cputype = PMC_CPU_INTEL_ATOM; - nclasses = 3; - break; case 0x1A: case 0x1E: /* * Per Intel document 253669-032 9/2009, @@ -221,6 +217,14 @@ pmc_intel_initialize(void) cputype = PMC_CPU_INTEL_ALDERLAKE; nclasses = 3; break; + case 0x1C: /* Per Intel document 320047-002. */ + case 0x26: + case 0x27: + case 0x35: + case 0x36: + cputype = PMC_CPU_INTEL_ATOM; + nclasses = 3; + break; case 0x37: case 0x4A: case 0x4D: /* Per Intel document 330061-001 01/2014. */ @@ -234,6 +238,15 @@ pmc_intel_initialize(void) cputype = PMC_CPU_INTEL_ATOM_GOLDMONT; nclasses = 3; break; + case 0x7A: + cputype = PMC_CPU_INTEL_ATOM_GOLDMONT_P; + nclasses = 3; + break; + case 0x86: + case 0x96: + cputype = PMC_CPU_INTEL_ATOM_TREMONT; + nclasses = 3; + break; } break; } diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h index b84044ea5c6c..372e77ecdee7 100644 --- a/sys/sys/pmc.h +++ b/sys/sys/pmc.h @@ -114,6 +114,8 @@ extern char pmc_cpuid[PMC_CPUID_LEN]; __PMC_CPU(INTEL_ICELAKE, 0x9B, "Intel Icelake") \ __PMC_CPU(INTEL_ICELAKE_XEON, 0x9C, "Intel Icelake Xeon") \ __PMC_CPU(INTEL_ALDERLAKE, 0x9D, "Intel Alderlake") \ + __PMC_CPU(INTEL_ATOM_GOLDMONT_P, 0x9E, "Intel Atom Goldmont Plus") \ + __PMC_CPU(INTEL_ATOM_TREMONT, 0x9F, "Intel Atom Tremont") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
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