Date: Tue, 13 Dec 2011 02:02:02 -0800 From: Adrian Chadd <adrian@freebsd.org> To: Stefan Bethke <stb@lassitu.de> Cc: freebsd-embedded@freebsd.org Subject: Re: TL-WR1043: switch Message-ID: <CAJ-Vmon4LF3LP1v-M=N7eH-3JuQgtHtBsjTho7JNJZjRz4Mo_w@mail.gmail.com> In-Reply-To: <E46FD75C-6DF3-4FD0-B384-48C5D8E2AB87@lassitu.de> References: <68ABED76-CB1F-405A-8036-EC254F7511FA@lassitu.de> <3B3DB17D-BF87-40EE-B1C1-445F178E8844@lassitu.de> <86030CEE-6839-4B96-ACDC-2BA9AC1E4AE4@lassitu.de> <2D625CC9-A0E3-47AA-A504-CE8FB2F90245@lassitu.de> <203BF1C8-D528-40C9-8611-9C7AC7E43BAB@lassitu.de> <3C0E9CA3-E130-4E9A-ABCC-1782E28999D1@lassitu.de> <CAJ-VmomWsGy9wMb0zA-WjTRP6Qh%2BO2u_Pe-rgkerFFpi04iKnw@mail.gmail.com> <6387ABA5-AC55-49DD-9058-E45CC0A3E0A0@lassitu.de> <CAJ-VmonM91s-kbbEqVDy9PvtH-gxLWYmusGiqzqCWMtfMdoo2A@mail.gmail.com> <EA0807C1-6FEE-4743-8DCA-1AC873664005@lassitu.de> <74E4AF57-3D22-415E-B913-176753B09B16@lassitu.de> <710E2C7A-E9AC-4103-8C61-0EDC4A3AF9DE@lassitu.de> <C2885254-F02C-401B-B56D-39F62933F3CC@lassitu.de> <CAJ-Vmon%2B-kWGURJ8ktpdztrgHkM5ffdfX4ddFMjYhY9ur_GL1Q@mail.gmail.com> <E46FD75C-6DF3-4FD0-B384-48C5D8E2AB87@lassitu.de>
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On 12 December 2011 23:54, Stefan Bethke <stb@lassitu.de> wrote: >> Does the arge0 "phy" map to a specific switch port phy, for general >> configuration and status? Or is it totally separate here (requiring >> configuration of rtl8366rb0portX ?) > > There is no PHY connected to arge0, just the switch MAC. =A0I believe the= RTL8366RB configures the CPU port (port 5) through pin strapping on power = up. =A0My code only return the current configuration, but does not allow yo= u to change it. Ok. So what's arge0's PHY configuration coming from? Or is it being handled as a multi-phy, where it forces speed/duplex (and MAC PLL + MII clock but I have to fix that for ar71xx/ar724x) and then just nails the port as always up, rather than binding a phy instance to it? Adrian
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