Date: Sat, 19 May 2012 20:11:18 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r235661 - head/sys/mips/conf Message-ID: <201205192011.q4JKBICn042969@svn.freebsd.org>
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Author: adrian Date: Sat May 19 20:11:18 2012 New Revision: 235661 URL: http://svn.freebsd.org/changeset/base/235661 Log: Enable the AR8316 switch on the routerstation pro board. The configuration is: * RGMII, both ports * arge0 - connected to PHY4 as a dedicated port (CPU port) * arge1 - connected to the switch ports I've verified this on my routerstation pro board. Modified: head/sys/mips/conf/RSPRO head/sys/mips/conf/RSPRO.hints Modified: head/sys/mips/conf/RSPRO ============================================================================== --- head/sys/mips/conf/RSPRO Sat May 19 20:05:27 2012 (r235660) +++ head/sys/mips/conf/RSPRO Sat May 19 20:11:18 2012 (r235661) @@ -21,6 +21,12 @@ options GEOM_PART_BSD options GEOM_PART_MBR options MSDOSFS +# For etherswitch support +options ARGE_MDIO +device miiproxy +device etherswitch +device arswitch + # Boot off of flash options ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\" Modified: head/sys/mips/conf/RSPRO.hints ============================================================================== --- head/sys/mips/conf/RSPRO.hints Sat May 19 20:05:27 2012 (r235660) +++ head/sys/mips/conf/RSPRO.hints Sat May 19 20:11:18 2012 (r235661) @@ -1,10 +1,27 @@ # $FreeBSD$ -hint.arge.0.phymask=0x10 - -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.phymask=0x0e +# arge0 mdio bus +hint.argemdio.0.at="nexus0" +hint.argemdio.0.maddr=0x19000000 +hint.argemdio.0.msize=0x1000 +hint.argemdio.0.order=0 + +# arge0: dedicated switch port +hint.arge.0.phymask=0x10 # PHY4 +hint.arge.0.miimode=3 # RGMII +hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus + +# arge1: nail to 1000/full, RGMII - connected to the switch +hint.arge.1.media=1000 # Map to 1000/full +hint.arge.1.fduplex=1 # +hint.arge.1.phymask=0x0 # no directly mapped PHYs +hint.arge.1.miimode=3 # RGMII + +hint.arswitch.0.is_7240=0 +hint.arswitch.0.numphys=4 +hint.arswitch.0.phy4cpu=1 +hint.arswitch.0.is_rgmii=1 +hint.arswitch.0.is_gmii=0 # Don't flip on anything that isn't already enabled. # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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