Date: Sat, 12 Sep 1998 11:49:59 -0400 (EDT) From: spork <spork@super-g.com> To: Steve Friedrich <SteveFriedrich@Hot-Shot.com> Cc: Manar Hussain <manar@ivision.co.uk>, "freebsd-hardware@FreeBSD.ORG" <freebsd-hardware@FreeBSD.ORG> Subject: Re: "Cacheable memory"?? Message-ID: <Pine.BSF.4.00.9809121148560.9027-100000@super-g.inch.com> In-Reply-To: <199809120218.WAA27389@laker.net>
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Thanks very much for your replies, this is making the decision much easier. I have another answer in private email that I will post if I get the author's permission. Charles Charles Sprickman spork@super-g.com ---- On Fri, 11 Sep 1998, Steve Friedrich wrote: > On Fri, 11 Sep 1998 19:58:08 -0400 (EDT), spork wrote: > > >Does anyone know what determines how much RAM is cacheable? I've seen > >different amounts with the same size cache. Is it a chipset issue? We > >have a few machines that would really like about 512M of RAM, is it a > >waste if it's not cacheable? > > Yes, it is a chipset issue, as in, which Triton chipset or ALI, > Alladin, etc. You can read about these chipsets at > www.tomshardware.com and it appears that the new BX based motherboards > for PIIs don't have these considerations. Also, it's not a waste if > it's not cacheable at the L2 level. I've seen the performance hit > expressed as anywhere between 2% and 15% for a cache miss at the L2 > level. You'll still be getting many cache hits at the L1 level. > > Up until Intel released the latest Celeron WITH cache, I would have > easily recommended the K6 over any Intel chip. But the 300a Celeron is > extremely overclockable and appears to be quite stable when > overclocked, and of course, it's much cheaper than the rest of the PII > line. I'd avoid the original Celeron like the plague (the version with > NO cache). > > > To Unsubscribe: send mail to majordomo@FreeBSD.org > with "unsubscribe freebsd-hardware" in the body of the message > To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message
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