Date: Wed, 6 Sep 2023 17:43:41 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 8f26d01f5331 - main - arm64: Fix the TCR_EPD0 definition Message-ID: <202309061743.386HhfHc002842@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=8f26d01f53316c055cc1116eb56ff438da50d831 commit 8f26d01f53316c055cc1116eb56ff438da50d831 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2023-09-06 17:32:15 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2023-09-06 17:32:49 +0000 arm64: Fix the TCR_EPD0 definition Sponsored by: Arm Ltd --- sys/arm64/include/armreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 5892a9b08502..034504727b39 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -2167,7 +2167,7 @@ #define TCR_IRGN0_SHIFT 8 #define TCR_IRGN0_WBWA (1UL << TCR_IRGN0_SHIFT) #define TCR_EPD0_SHIFT 7 -#define TCR_EPD0 (1UL << TCR_EPD1_SHIFT) +#define TCR_EPD0 (1UL << TCR_EPD0_SHIFT) /* Bit 6 is reserved */ #define TCR_T0SZ_SHIFT 0 #define TCR_T0SZ_MASK 0x3f
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