Date: Sun, 30 Nov 2025 01:45:47 +0000 From: Robert Clausecker <fuz@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Cc: Strahinja =?utf-8?Q?Stani=C5=A1?==?utf-8?Q?i=C4=87?= <strajabot@FreeBSD.org> Subject: git: 09d15e9bc256 - stable/15 - simd.7: add scalar strrchr() for RISC-V to manpage Message-ID: <692ba1cb.29cb3.6b3433bd@gitrepo.freebsd.org>
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The branch stable/15 has been updated by fuz: URL: https://cgit.FreeBSD.org/src/commit/?id=09d15e9bc256b38d0c8c0d1200ab35a0ad541b77 commit 09d15e9bc256b38d0c8c0d1200ab35a0ad541b77 Author: Strahinja Stanišić <strajabot@FreeBSD.org> AuthorDate: 2024-10-24 16:29:04 +0000 Commit: Robert Clausecker <fuz@FreeBSD.org> CommitDate: 2025-11-30 00:43:05 +0000 simd.7: add scalar strrchr() for RISC-V to manpage MFC after: 1 month MFC to: stable/15 Approved by: mhorne, markj (mentor) Sponsored by: Google LLC (GSoC 2024) Differential Revision: https://reviews.freebsd.org/D47275 (cherry picked from commit 63ff982b17ee398c7808be323d8fd37819a5863c) --- lib/libc/riscv/string/strrchr.S | 3 +++ share/man/man7/simd.7 | 15 +++++++++------ 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/lib/libc/riscv/string/strrchr.S b/lib/libc/riscv/string/strrchr.S index 51f34ca21fac..e922a692e77f 100644 --- a/lib/libc/riscv/string/strrchr.S +++ b/lib/libc/riscv/string/strrchr.S @@ -6,6 +6,9 @@ #include <machine/asm.h> + .weak rindex + .set rindex, strrchr + /* * a0 - const char *s * a1 - int c diff --git a/share/man/man7/simd.7 b/share/man/man7/simd.7 index d5092348d9b3..92cbbdee25a4 100644 --- a/share/man/man7/simd.7 +++ b/share/man/man7/simd.7 @@ -24,7 +24,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE . -.Dd November 18, 2024 +.Dd October 8, 2025 .Dt SIMD 7 .Os .Sh NAME @@ -50,7 +50,7 @@ can be used to override this mechanism. .Pp Enhanced functions are present for the following architectures: .Bl -column FUNCTION_________ aarch64_ arm_ amd64_ i386_ ppc64_ -offset indent -.It Em FUNCTION Ta Em AARCH64 Ta Em ARM Ta Em AMD64 Ta Em I386 Ta Em PPC64 +.It Em FUNCTION Ta Em AARCH64 Ta Em ARM Ta Em AMD64 Ta Em I386 Ta Em PPC64 Ta Em RISC-V .It bcmp Ta A Ta Ta S1 Ta S .It bcopy Ta A Ta S Ta S Ta S Ta SV .It bzero Ta A Ta S Ta S Ta S @@ -65,7 +65,7 @@ Enhanced functions are present for the following architectures: .It memmove Ta A Ta S Ta S Ta S Ta SV .It memrchr Ta A Ta Ta S1 .It memset Ta A Ta S Ta S Ta S -.It rindex Ta A Ta Ta S1 Ta S +.It rindex Ta A Ta Ta S1 Ta S Ta Ta S .It stpcpy Ta A Ta Ta S1 .It stpncpy Ta Ta Ta S1 .It strcat Ta A Ta Ta S1 Ta S @@ -81,7 +81,7 @@ Enhanced functions are present for the following architectures: .It strncmp Ta A Ta S Ta S1 Ta S .It strncpy Ta Ta Ta S1 Ta Ta S2 .It strnlen Ta A Ta Ta S1 -.It strrchr Ta A Ta Ta S1 Ta S +.It strrchr Ta A Ta Ta S1 Ta S Ta Ta S .It strpbrk Ta S Ta Ta S2 .It strsep Ta S Ta Ta S2 .It strspn Ta S Ta Ta S2 @@ -207,10 +207,13 @@ for .Fx 11.0 for .Cm aarch64 , -and .Fx 12.0 for -.Cm powerpc64 . +.Cm powerpc64 , +and +.Fx 16.0 +for +.Cm riscv64 . SIMD-enhanced functions were first added with .Fx 13.0 forhelp
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