Date: Sun, 4 Jan 2009 15:48:38 +0000 (UTC) From: Stanislav Sedov <stas@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r186738 - head/share/man/man4 Message-ID: <200901041548.n04Fmcc5060920@svn.freebsd.org>
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Author: stas Date: Sun Jan 4 15:48:38 2009 New Revision: 186738 URL: http://svn.freebsd.org/changeset/base/186738 Log: - Improve wording. - ae(4) first appeared in 7.1. Reflect this. Approved by: kib (mentor) MFC after: 1 week Modified: head/share/man/man4/ae.4 Modified: head/share/man/man4/ae.4 ============================================================================== --- head/share/man/man4/ae.4 Sun Jan 4 15:41:01 2009 (r186737) +++ head/share/man/man4/ae.4 Sun Jan 4 15:48:38 2009 (r186738) @@ -121,8 +121,7 @@ the network connection (cable). .It "ae%d: reset timeout." The card reset operation has been timed out. .It "ae%d: Generating random ethernet address." -No valid ethernet address was found neither in the controller registers not in -NVRAM. +No valid Ethernet address was found in the controller NVRAM and registers. Random locally administered address with ASUS OUI identifier will be used instead. .El @@ -135,8 +134,8 @@ instead. .Xr vlan 4 , .Xr ifconfig 8 .Sh BUGS -The Attansic L2 FastEthernet contoller supports DMA but do not use a descriptor -based transfer mechanism via scatter-gather DMA. +The Attansic L2 FastEthernet contoller supports DMA but does not use a +descriptor based transfer mechanism via scatter-gather DMA. Thus the data should be copied to/from the controller memory on each transmit/receive. Furthermore, a lot of data alignment restrictions apply. @@ -150,4 +149,4 @@ driver and this manual page was written .An Stanislav Sedov .Aq stas@FreeBSD.org . It first appeared in -.Fx 8.0 . +.Fx 7.1 .
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