Date: Tue, 2 May 2006 22:41:09 GMT From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 96574 for review Message-ID: <200605022241.k42Mf9Zg058149@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=96574 Change 96574 by marcel@marcel_nfs on 2006/05/02 22:41:09 o Add a PCI bus frontend for scc(4) and recognize the Digi Sync/570i 2-port and 4-port cards. o Since the Digi cards are based on the Hitachi HD64570, add a new class and hardware backend. The attach fails unconditionally now. We already have a header for the hd64570 under dev/ic. See ar(4). o Renumber the SCC class to be 1-based. This avoids that an uninitialized variable is misinterpreted. Resort the list while I'm renumbering. Notes: o The HD64570 needs 2 I/O resources. This will cause changes to uart(4) as well. It is assumed that a single I/O resource is enough. o The ar(4) driver is a good source of information. While it only compiles on i386 and doesn't use newbus(9), it should work isufficiently. o Also, the ar(4) driver hooks up with netgraph, which is what hdlc(4) is going to do as well. This too is very convenient. Affected files ... .. //depot/projects/uart/conf/files#66 edit .. //depot/projects/uart/dev/scc/scc_bfe.h#19 edit .. //depot/projects/uart/dev/scc/scc_bfe_ebus.c#9 edit .. //depot/projects/uart/dev/scc/scc_bfe_macio.c#2 edit .. //depot/projects/uart/dev/scc/scc_bfe_pci.c#1 add .. //depot/projects/uart/dev/scc/scc_bfe_sbus.c#9 edit .. //depot/projects/uart/dev/scc/scc_bus.h#11 edit .. //depot/projects/uart/dev/scc/scc_core.c#23 edit .. //depot/projects/uart/dev/scc/scc_dev_hd64570.c#1 add Differences ... ==== //depot/projects/uart/conf/files#66 (text+ko) ==== @@ -838,8 +838,10 @@ dev/sbsh/if_sbsh.c optional sbsh dev/scc/scc_if.m optional scc dev/scc/scc_bfe_ebus.c optional scc ebus +dev/scc/scc_bfe_pci.c optional scc pci dev/scc/scc_bfe_sbus.c optional scc fhc | scc sbus dev/scc/scc_core.c optional scc +dev/scc/scc_dev_hd64570.c optional scc dev/scc/scc_dev_sab82532.c optional scc dev/scc/scc_dev_z8530.c optional scc dev/scd/scd.c optional scd isa ==== //depot/projects/uart/dev/scc/scc_bfe.h#19 (text) ==== @@ -109,6 +109,7 @@ int cl_range; }; +extern struct scc_class scc_hd64570_class; extern struct scc_class scc_sab82532_class; extern struct scc_class scc_z8530_class; @@ -138,7 +139,7 @@ int scc_bfe_attach(device_t dev); int scc_bfe_detach(device_t dev); -int scc_bfe_probe(device_t dev, u_int, u_int); +int scc_bfe_probe(device_t dev, u_int regshft, u_int rclk, u_int rid); struct resource *scc_bus_alloc_resource(device_t, device_t, int, int *, u_long, u_long, u_long, u_int); ==== //depot/projects/uart/dev/scc/scc_bfe_ebus.c#9 (text) ==== @@ -59,7 +59,7 @@ if (!strcmp(nm, "se") || !strcmp(cmpt, "sab82532")) { device_set_desc(dev, "Siemens SAB 82532 dual channel SCC"); sc->sc_class = &scc_sab82532_class; - return (scc_bfe_probe(dev, EBUS_REGSHFT, EBUS_RCLK)); + return (scc_bfe_probe(dev, EBUS_REGSHFT, EBUS_RCLK, 0)); } return (ENXIO); } ==== //depot/projects/uart/dev/scc/scc_bfe_macio.c#2 (text) ==== @@ -56,7 +56,7 @@ if (!strcmp(nm, "escc")) { device_set_desc(dev, "Zilog Z8530 dual channel SCC"); sc->sc_class = &scc_z8530_class; - return (scc_bfe_probe(dev, MACIO_REGSHFT, MACIO_RCLK)); + return (scc_bfe_probe(dev, MACIO_REGSHFT, MACIO_RCLK, 0)); } return (ENXIO); } ==== //depot/projects/uart/dev/scc/scc_bfe_sbus.c#9 (text) ==== @@ -56,7 +56,7 @@ if (!strcmp(nm, "zs")) { device_set_desc(dev, "Zilog Z8530 dual channel SCC"); sc->sc_class = &scc_z8530_class; - return (scc_bfe_probe(dev, SBUS_REGSHFT, SBUS_RCLK)); + return (scc_bfe_probe(dev, SBUS_REGSHFT, SBUS_RCLK, 0)); } return (ENXIO); } ==== //depot/projects/uart/dev/scc/scc_bus.h#11 (text) ==== @@ -40,8 +40,9 @@ #define SCC_IVAR_HWMTX 5 /* Hardware class -- the SCC type. */ -#define SCC_CLASS_SAB82532 0 -#define SCC_CLASS_Z8530 1 +#define SCC_CLASS_HD64570 1 +#define SCC_CLASS_SAB82532 2 +#define SCC_CLASS_Z8530 3 /* The possible modes supported by the SCC. */ #define SCC_MODE_ASYNC 0x01 ==== //depot/projects/uart/dev/scc/scc_core.c#23 (text) ==== @@ -330,7 +330,7 @@ } int -scc_bfe_probe(device_t dev, u_int regshft, u_int rclk) +scc_bfe_probe(device_t dev, u_int regshft, u_int rclk, u_int rid) { struct scc_softc *sc; struct scc_class *cl; @@ -359,12 +359,12 @@ * I/O space. Any SCC that needs multiple windows will consequently * not be supported by this driver as-is. */ - sc->sc_rrid = 0; + sc->sc_rrid = rid; sc->sc_rtype = SYS_RES_MEMORY; sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, cl->cl_channels * size, RF_ACTIVE); if (sc->sc_rres == NULL) { - sc->sc_rrid = 0; + sc->sc_rrid = rid; sc->sc_rtype = SYS_RES_IOPORT; sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, cl->cl_channels * size, RF_ACTIVE);
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