Date: Tue, 3 Mar 2020 15:31:40 +0000 (UTC) From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r358584 - in head/sys/arm64: arm64 include Message-ID: <202003031531.023FVeCT047604@repo.freebsd.org>
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Author: andrew Date: Tue Mar 3 15:31:40 2020 New Revision: 358584 URL: https://svnweb.freebsd.org/changeset/base/358584 Log: Fix the spelling of aliasing. Sponsored by: Innovate UK Modified: head/sys/arm64/arm64/identcpu.c head/sys/arm64/include/cpufunc.h Modified: head/sys/arm64/arm64/identcpu.c ============================================================================== --- head/sys/arm64/arm64/identcpu.c Tue Mar 3 15:25:01 2020 (r358583) +++ head/sys/arm64/arm64/identcpu.c Tue Mar 3 15:31:40 2020 (r358584) @@ -965,7 +965,7 @@ update_user_regs(u_int cpu) extern u_long elf_hwcap; bool __read_frequently lse_supported = false; -bool __read_frequently icache_alising = false; +bool __read_frequently icache_aliasing = false; bool __read_frequently icache_vmid = false; int64_t dcache_line_size; /* The minimum D cache line size */ @@ -1328,7 +1328,7 @@ identify_cache(uint64_t ctr) break; default: case CTR_L1IP_VIPT: - icache_alising = true; + icache_aliasing = true; break; } Modified: head/sys/arm64/include/cpufunc.h ============================================================================== --- head/sys/arm64/include/cpufunc.h Tue Mar 3 15:25:01 2020 (r358583) +++ head/sys/arm64/include/cpufunc.h Tue Mar 3 15:31:40 2020 (r358584) @@ -199,7 +199,7 @@ invalidate_local_icache(void) "isb \n"); } -extern bool icache_alising; +extern bool icache_aliasing; extern bool icache_vmid; extern int64_t dcache_line_size;
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