Date: Sun, 30 Nov 2014 00:09:27 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r275281 - projects/clang350-import/contrib/llvm/patches Message-ID: <201411300009.sAU09R85096921@svn.freebsd.org>
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Author: dim Date: Sun Nov 30 00:09:26 2014 New Revision: 275281 URL: https://svnweb.freebsd.org/changeset/base/275281 Log: Add patch file for r275280. Added: projects/clang350-import/contrib/llvm/patches/patch-19-llvm-r215811-arm-fpu-directive.diff Added: projects/clang350-import/contrib/llvm/patches/patch-19-llvm-r215811-arm-fpu-directive.diff ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/clang350-import/contrib/llvm/patches/patch-19-llvm-r215811-arm-fpu-directive.diff Sun Nov 30 00:09:26 2014 (r275281) @@ -0,0 +1,90 @@ +Pull in r215811 from upstream llvm trunk (by Nico Weber): + + arm asm: Let .fpu enable instructions, PR20447. + + I'm not very happy with duplicating the fpu->feature mapping in ARMAsmParser.cpp + and in clang's driver. See the bug for a patch that doesn't do that, and the + review thread [1] for why this duplication exists. + + 1: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140811/231052.html + +This makes the .fpu directive work properly, so we can successfully +assemble several .S files using the directive, under lib/libc/arm. + +Introduced here: http://svnweb.freebsd.org/changeset/base/275280 + +Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp +=================================================================== +--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp ++++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp +@@ -8621,6 +8621,30 @@ bool ARMAsmParser::parseDirectiveCPU(SMLoc L) { + return false; + } + ++// FIXME: This is duplicated in getARMFPUFeatures() in ++// tools/clang/lib/Driver/Tools.cpp ++static const struct { ++ const unsigned Fpu; ++ const uint64_t Enabled; ++ const uint64_t Disabled; ++} Fpus[] = { ++ {ARM::VFP, ARM::FeatureVFP2, ARM::FeatureNEON}, ++ {ARM::VFPV2, ARM::FeatureVFP2, ARM::FeatureNEON}, ++ {ARM::VFPV3, ARM::FeatureVFP3, ARM::FeatureNEON}, ++ {ARM::VFPV3_D16, ARM::FeatureVFP3 | ARM::FeatureD16, ARM::FeatureNEON}, ++ {ARM::VFPV4, ARM::FeatureVFP4, ARM::FeatureNEON}, ++ {ARM::VFPV4_D16, ARM::FeatureVFP4 | ARM::FeatureD16, ARM::FeatureNEON}, ++ {ARM::FP_ARMV8, ARM::FeatureFPARMv8, ++ ARM::FeatureNEON | ARM::FeatureCrypto}, ++ {ARM::NEON, ARM::FeatureNEON, 0}, ++ {ARM::NEON_VFPV4, ARM::FeatureVFP4 | ARM::FeatureNEON, 0}, ++ {ARM::NEON_FP_ARMV8, ARM::FeatureFPARMv8 | ARM::FeatureNEON, ++ ARM::FeatureCrypto}, ++ {ARM::CRYPTO_NEON_FP_ARMV8, ++ ARM::FeatureFPARMv8 | ARM::FeatureNEON | ARM::FeatureCrypto, 0}, ++ {ARM::SOFTVFP, 0, 0}, ++}; ++ + /// parseDirectiveFPU + /// ::= .fpu str + bool ARMAsmParser::parseDirectiveFPU(SMLoc L) { +@@ -8636,6 +8660,18 @@ bool ARMAsmParser::parseDirectiveFPU(SMLoc L) { + return false; + } + ++ for (const auto &Fpu : Fpus) { ++ if (Fpu.Fpu != ID) ++ continue; ++ ++ // Need to toggle features that should be on but are off and that ++ // should off but are on. ++ unsigned Toggle = (Fpu.Enabled & ~STI.getFeatureBits()) | ++ (Fpu.Disabled & STI.getFeatureBits()); ++ setAvailableFeatures(ComputeAvailableFeatures(STI.ToggleFeature(Toggle))); ++ break; ++ } ++ + getTargetStreamer().emitFPU(ID); + return false; + } +Index: test/MC/ARM/directive-fpu-instrs.s +=================================================================== +--- test/MC/ARM/directive-fpu-instrs.s ++++ test/MC/ARM/directive-fpu-instrs.s +@@ -0,0 +1,16 @@ ++// RUN: llvm-mc -triple armv7-unknown-linux-gnueabi -mattr=+vfp3,+d16,-neon %s ++ ++.fpu neon ++VAND d3, d5, d5 ++vldr d21, [r7, #296] ++ ++@ .thumb should not disable the prior .fpu neon ++.thumb ++ ++vmov q4, q11 @ v4si ++str r6, [r7, #264] ++mov r6, r5 ++vldr d21, [r7, #296] ++add r9, r7, #216 ++ ++fstmfdd sp!, {d8, d9, d10, d11, d12, d13, d14, d15}
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