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Date:      Tue, 13 Mar 2018 13:14:46 -0500
From:      Justin Hibbits <jrh29@alumni.cwru.edu>
To:        Nathan Whitehorn <nwhitehorn@freebsd.org>
Cc:        src-committers <src-committers@freebsd.org>, svn-src-all@freebsd.org,  svn-src-head@freebsd.org
Subject:   Re: svn commit: r330845 - in head/sys/powerpc: aim ofw powerpc
Message-ID:  <CAHSQbTBEwyYqijfi=K537kOF%2B_j17Dr1=QoEs05u30E0Q6XjpQ@mail.gmail.com>
In-Reply-To: <201803131503.w2DF3wLJ064986@repo.freebsd.org>
References:  <201803131503.w2DF3wLJ064986@repo.freebsd.org>

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This broke the powerpc (32-bit) build.

On Tue, Mar 13, 2018 at 10:03 AM, Nathan Whitehorn
<nwhitehorn@freebsd.org> wrote:
> Author: nwhitehorn
> Date: Tue Mar 13 15:03:58 2018
> New Revision: 330845
> URL: https://svnweb.freebsd.org/changeset/base/330845
>
> Log:
>   Execute PowerPC64/AIM kernel from direct map region when possible.
>
>   When the kernel can be in real mode in early boot, we can execute from
>   high addresses aliased to the kernel's physical memory. If that high
>   address has the first two bits set to 1 (0xc...), those addresses will
>   automatically become part of the direct map. This reduces page table
>   pressure from the kernel and it sets up the kernel to be used with
>   radix translation, for which it has to be up here.
>
>   This is accomplished by exploiting the fact that all PowerPC kernels are
>   built as position-independent executables and relocate themselves
>   on start. Before this patch, the kernel runs at 1:1 VA:PA, but that
>   VA/PA is random and set by the bootloader. Very early, it processes
>   its ELF relocations to operate wherever it happens to find itself.
>   This patch uses that mechanism to re-enter and re-relocate the kernel
>   a second time witha new base address set up in the early parts of
>   powerpc_init().
>
>   Reviewed by:  jhibbits
>   Differential Revision:        D14647
>
> Modified:
>   head/sys/powerpc/aim/aim_machdep.c
>   head/sys/powerpc/aim/locore64.S
>   head/sys/powerpc/aim/mmu_oea64.c
>   head/sys/powerpc/ofw/ofwcall64.S
>   head/sys/powerpc/powerpc/machdep.c
>
> Modified: head/sys/powerpc/aim/aim_machdep.c
> ==============================================================================
> --- head/sys/powerpc/aim/aim_machdep.c  Tue Mar 13 15:02:46 2018        (r330844)
> +++ head/sys/powerpc/aim/aim_machdep.c  Tue Mar 13 15:03:58 2018        (r330845)
> @@ -160,15 +160,72 @@ extern void       *dlmisstrap, *dlmisssize;
>  extern void    *dsmisstrap, *dsmisssize;
>
>  extern void *ap_pcpu;
> +extern void __restartkernel(vm_offset_t, vm_offset_t, vm_offset_t, void *, uint32_t, register_t offset, register_t msr);
>
> +void aim_early_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry,
> +    void *mdp, uint32_t mdp_cookie);
>  void aim_cpu_init(vm_offset_t toc);
>
>  void
> +aim_early_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp,
> +    uint32_t mdp_cookie)
> +{
> +       register_t      scratch;
> +
> +       /*
> +        * If running from an FDT, make sure we are in real mode to avoid
> +        * tromping on firmware page tables. Everything in the kernel assumes
> +        * 1:1 mappings out of firmware, so this won't break anything not
> +        * already broken. This doesn't work if there is live OF, since OF
> +        * may internally use non-1:1 mappings.
> +        */
> +       if (ofentry == 0)
> +               mtmsr(mfmsr() & ~(PSL_IR | PSL_DR));
> +
> +#ifdef __powerpc64__
> +       /*
> +        * If in real mode, relocate to high memory so that the kernel
> +        * can execute from the direct map.
> +        */
> +       if (!(mfmsr() & PSL_DR) &&
> +           (vm_offset_t)&aim_early_init < DMAP_BASE_ADDRESS)
> +               __restartkernel(fdt, 0, ofentry, mdp, mdp_cookie,
> +                   DMAP_BASE_ADDRESS, mfmsr());
> +#endif
> +
> +       /* Various very early CPU fix ups */
> +       switch (mfpvr() >> 16) {
> +               /*
> +                * PowerPC 970 CPUs have a misfeature requested by Apple that
> +                * makes them pretend they have a 32-byte cacheline. Turn this
> +                * off before we measure the cacheline size.
> +                */
> +               case IBM970:
> +               case IBM970FX:
> +               case IBM970MP:
> +               case IBM970GX:
> +                       scratch = mfspr(SPR_HID5);
> +                       scratch &= ~HID5_970_DCBZ_SIZE_HI;
> +                       mtspr(SPR_HID5, scratch);
> +                       break;
> +       #ifdef __powerpc64__
> +               case IBMPOWER7:
> +               case IBMPOWER7PLUS:
> +               case IBMPOWER8:
> +               case IBMPOWER8E:
> +                       /* XXX: get from ibm,slb-size in device tree */
> +                       n_slbs = 32;
> +                       break;
> +       #endif
> +       }
> +}
> +
> +void
>  aim_cpu_init(vm_offset_t toc)
>  {
>         size_t          trap_offset, trapsize;
>         vm_offset_t     trap;
> -       register_t      msr, scratch;
> +       register_t      msr;

scratch is used in powerpc, but not powerpc64.



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