Date: Tue, 02 Sep 1997 23:45:42 -0600 From: Steve Passe <smp@csn.net> To: Simon Shapiro <Shimon@i-connect.net> Cc: mef@cs.washington.edu, FreeBSD-SMP@FreeBSD.ORG Subject: Re: Open Issues on P6DNH Message-ID: <199709030545.XAA03029@Ilsa.StevesCafe.com> In-Reply-To: Your message of "Tue, 02 Sep 1997 21:51:50 PDT." <XFMail.970902215150.Shimon@i-Connect.Net>
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Hi,
> > What the deal with the P6DNH motherboard from Supermicro? A while
> > back you posted a set of problems to the smp mailing list. Are these
> > now resolved? Is the P6DNH MB a good one to buy if one wants to play
> > around with i2o?
>
> Last I left these issues, Steve said the MPTable is corrupt. I forwarded
> that to SuperMicro ``support'' which immediately said this is the way it
> should be, to stop my wild loughing, they supposedly forwarded the details
> to AMI. Did not hear anything since. The board is excellent, we are using
> many of them (we need ALL 8 PCI slots. I am working closely on this issue
> and hopefully in the next few weeks something will happen.
It is my belief that the mptable is 'incorrect'. This statement could come
back to embarrass me, but I would be willing to place a small wager on it.
If the table is correct as is, then I have a fundimental misunderstanding
of what it can look like. For the record, the part I dispute is:
--
Bus: Bus ID Type
0 PCI
1 PCI
2 ISA
--
I/O APICs: APIC ID Version State Address
2 0x11 usable 0xfec00000
--
I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
INT active-lo level 1 1:A 2 16
INT active-lo level 1 0:A 2 16
INT active-lo level 0 20:A 2 16
INT active-lo level 0 19:A 2 16
INT active-lo level 0 17:A 2 16
INT active-lo level 0 16:A 2 16
INT active-lo level 0 18:A 2 17
INT active-lo level 1 1:A 2 18
INT active-lo level 1 0:A 2 18
INT active-lo level 0 20:A 2 18
INT active-lo level 0 19:A 2 18
INT active-lo level 0 17:A 2 18
INT active-lo level 0 16:A 2 18
INT active-lo level 1 1:A 2 19
INT active-lo level 1 0:A 2 19
INT active-lo level 0 20:A 2 19
INT active-lo level 0 19:A 2 19
INT active-lo level 0 17:A 2 19
INT active-lo level 0 16:A 2 19
---
This mptable shows PCI INTs going to multiple APIC pins, for instance:
INT active-lo level 0 20:A 2 16
INT active-lo level 0 20:A 2 18
INT active-lo level 0 20:A 2 19
PCI INT 20:A should NOT being going to 3 different APIC pins. I think what
is wrong is that they mean to show 20:A, 20:B and 20:C, but they somehow
mess that part up. I could have a bug in my parse code, but other similar
boards parse correctly, such as this HP Netserver 5/133 (Intel XXPRESS):
INT active-hi level 0 11:A 13 0
INT active-hi level 0 12:A 13 1
INT active-hi level 0 13:A 13 2
INT active-hi level 1 12:A 13 3
INT active-hi level 1 15:A 13 4
INT active-hi level 0 11:B 13 5
INT active-hi level 0 12:C 13 5
INT active-hi level 0 13:D 13 5
INT active-hi level 1 12:B 13 5
INT active-hi level 1 15:C 13 5
INT active-hi level 0 11:C 13 6
INT active-hi level 0 12:D 13 6
INT active-hi level 0 13:B 13 6
INT active-hi level 1 12:C 13 6
INT active-hi level 1 15:D 13 6
INT active-hi level 0 11:D 13 7
INT active-hi level 0 12:B 13 7
INT active-hi level 0 13:C 13 7
INT active-hi level 1 12:D 13 7
INT active-hi level 1 15:B 13 7
INT active-hi level 1 13:A 13 12
INT active-hi level 1 14:A 13 13
--
Steve Passe | powered by
smp@csn.net | Symmetric MultiProcessor FreeBSD
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