Date: Sat, 12 Oct 2002 05:53:15 +0200 (CEST) From: Hembo@ppp.micron.dk To: FreeBSD-gnats-submit@FreeBSD.org Cc: hembo@micron.dk Subject: kern/43953: Backport of BMC5703 drivers Message-ID: <200210120353.FAA17967@ppp.micron.dk>
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>Number: 43953
>Category: kern
>Synopsis: Backport of BMC5703 drivers
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: freebsd-bugs
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: update
>Submitter-Id: current-users
>Arrival-Date: Fri Oct 11 20:00:13 PDT 2002
>Closed-Date:
>Last-Modified:
>Originator: Michael Hembo
>Release: FreeBSD 4.7-STABLE i386
>Organization:
Arrownet A/S
>Environment:
System: FreeBSD install.arrownet.dk 4.7-STABLE FreeBSD 4.7-STABLE #0: Sat Oct 12 02:56:56 CEST 2002 root@install.arrownet.dk:/mnt/local/site/src_RELENG_4/src/sys/compile/GENERIC i386
<machine, os, target, libraries (multiple lines)>
>Description:
IBM eServer x305 w. dual onboard Broadcom 5703
<precise description of the problem (multiple lines)>
>How-To-Repeat:
Lack of RELENG_4 drivers.
<code/input/activities to reproduce the problem (multiple lines)>
>Fix:
I have backportet the drivers from CURRENT.
<how to correct or work around the problem, if known (multiple lines)>
Files ported: from rev.
src/sys/dev/bge/if_bge.c (1.24)
src/sys/dev/bge/if_bgereg.h (1.9)
src/sys/dev/mii/miidevs (1.21)
src/sys/dev/mii/miidevs.h (1.19)
src/sys/dev/mii/brgphy.c (1.14)
Added support for Broadcom 5703x in RELENG_4
Sincerely yours
Michael Hembo
hembo@micron.dk
-- Patches --
--- src/sys/dev/mii/brgphy.c.org Thu Apr 4 08:12:48 2002
+++ src/sys/dev/mii/brgphy.c Thu Oct 10 15:17:13 2002
@@ -122,6 +122,12 @@
return(0);
}
+ if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
+ MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) {
+ device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703);
+ return(0);
+ }
+
return(ENXIO);
}
--- src/sys/dev/bge/if_bge.c.org Thu Oct 10 18:02:33 2002
+++ src/sys/dev/bge/if_bge.c Fri Oct 11 19:04:25 2002
@@ -141,6 +141,8 @@
"Broadcom BCM5701 Gigabit Ethernet" },
{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702X,
"Broadcom BCM5702X Gigabit Ethernet" },
+ { BCOM_VENDORID, BCOM_DEVICEID_BCM5703X,
+ "Broadcom BCM5703X Gigabit Ethernet" },
{ SK_VENDORID, SK_DEVICEID_ALTIMA,
"SysKonnect Gigabit Ethernet" },
{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1000,
@@ -484,8 +486,12 @@
sc = device_get_softc(dev);
ifp = &sc->arpcom.ac_if;
- if (sc->bge_asicrev == BGE_ASICREV_BCM5701_B5 && phy != 1)
+ if (phy != 1)
+ switch(sc->bge_asicrev) {
+ case BGE_ASICREV_BCM5701_B5:
+ case BGE_ASICREV_BCM5703_A2:
return(0);
+ }
CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ|BGE_MICOMM_BUSY|
BGE_MIPHY(phy)|BGE_MIREG(reg));
@@ -1040,7 +1046,6 @@
bge_chipinit(sc)
struct bge_softc *sc;
{
- u_int32_t cachesize;
int i;
/* Set endianness before we access any non-PCI registers. */
@@ -1098,53 +1103,11 @@
BGE_MODECTL_NO_RX_CRC|BGE_MODECTL_TX_NO_PHDR_CSUM|
BGE_MODECTL_RX_NO_PHDR_CSUM);
- /* Get cache line size. */
- cachesize = pci_read_config(sc->bge_dev, BGE_PCI_CACHESZ, 1);
-
/*
- * Avoid violating PCI spec on certain chip revs.
+ * Disable memory write invalidate. Apparently it is not supported
+ * properly by these devices.
*/
- if (pci_read_config(sc->bge_dev, BGE_PCI_CMD, 4) & PCIM_CMD_MWIEN) {
- switch(cachesize) {
- case 1:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_16BYTES, 4);
- break;
- case 2:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_32BYTES, 4);
- break;
- case 4:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_64BYTES, 4);
- break;
- case 8:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_128BYTES, 4);
- break;
- case 16:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_256BYTES, 4);
- break;
- case 32:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_512BYTES, 4);
- break;
- case 64:
- PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
- BGE_PCI_WRITE_BNDRY_1024BYTES, 4);
- break;
- default:
- /* Disable PCI memory write and invalidate. */
- if (bootverbose)
- printf("bge%d: cache line size %d not "
- "supported; disabling PCI MWI\n",
- sc->bge_unit, cachesize);
- PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD,
- PCIM_CMD_MWIEN, 4);
- break;
- }
- }
+ PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4);
#ifdef __brokenalpha__
/*
@@ -1153,7 +1116,8 @@
* restriction on some ALPHA platforms with early revision
* 21174 PCI chipsets, such as the AlphaPC 164lx
*/
- PCI_SETBIT(sc, BGE_PCI_DMA_RW_CTL, BGE_PCI_READ_BNDRY_1024, 4);
+ PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
+ BGE_PCI_READ_BNDRY_1024BYTES, 4);
#endif
/* Set the timer prescaler (always 66Mhz) */
@@ -1556,6 +1520,7 @@
struct ifnet *ifp;
struct bge_softc *sc;
u_int32_t hwcfg = 0;
+ u_int32_t mac_addr = 0;
int unit, error = 0, rid;
s = splimp();
@@ -1581,7 +1546,7 @@
rid = BGE_PCI_BAR0;
sc->bge_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
- 0, ~0, 1, RF_ACTIVE);
+ 0, ~0, 1, RF_ACTIVE|PCI_RF_DENSE);
if (sc->bge_res == NULL) {
printf ("bge%d: couldn't map memory\n", unit);
@@ -1593,22 +1558,6 @@
sc->bge_bhandle = rman_get_bushandle(sc->bge_res);
sc->bge_vhandle = (vm_offset_t)rman_get_virtual(sc->bge_res);
- /*
- * XXX FIXME: rman_get_virtual() on the alpha is currently
- * broken and returns a physical address instead of a kernel
- * virtual address. Consequently, we need to do a little
- * extra mangling of the vhandle on the alpha. This should
- * eventually be fixed! The whole idea here is to get rid
- * of platform dependencies.
- */
-#ifdef __alpha__
- if (pci_cvt_to_bwx(sc->bge_vhandle))
- sc->bge_vhandle = pci_cvt_to_bwx(sc->bge_vhandle);
- else
- sc->bge_vhandle = pci_cvt_to_dense(sc->bge_vhandle);
- sc->bge_vhandle = ALPHA_PHYS_TO_K0SEG(sc->bge_vhandle);
-#endif
-
/* Allocate interrupt */
rid = 0;
@@ -1645,7 +1594,16 @@
/*
* Get station address from the EEPROM.
*/
- if (bge_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
+ mac_addr = bge_readmem_ind(sc, 0x0c14);
+ if ((mac_addr >> 16) == 0x484b) {
+ sc->arpcom.ac_enaddr[0] = (u_char)(mac_addr >> 8);
+ sc->arpcom.ac_enaddr[1] = (u_char)mac_addr;
+ mac_addr = bge_readmem_ind(sc, 0x0c18);
+ sc->arpcom.ac_enaddr[2] = (u_char)(mac_addr >> 24);
+ sc->arpcom.ac_enaddr[3] = (u_char)(mac_addr >> 16);
+ sc->arpcom.ac_enaddr[4] = (u_char)(mac_addr >> 8);
+ sc->arpcom.ac_enaddr[5] = (u_char)mac_addr;
+ } else if (bge_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
BGE_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) {
printf("bge%d: failed to read station address\n", unit);
bge_release_resources(sc);
--- src/sys/dev/bge/if_bgereg.h.org Thu Oct 10 18:02:33 2002
+++ src/sys/dev/bge/if_bgereg.h Fri Oct 11 19:13:51 2002
@@ -202,9 +202,9 @@
#define BGE_PCIMISCCTL_ASICREV 0xFFFF0000
#define BGE_BIGENDIAN_INIT \
- (BGE_BGE_PCIMISCCTL_ENDIAN_BYTESWAP| \
+ (BGE_PCIMISCCTL_ENDIAN_BYTESWAP| \
BGE_PCIMISCCTL_ENDIAN_WORDSWAP|BGE_PCIMISCCTL_CLEAR_INTA| \
- BGE_PCIMISCCTL_INDIRECT_ACCESS|PCIMISCCTL_MASK_PCI_INTR)
+ BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR)
#define BGE_LITTLEENDIAN_INIT \
(BGE_PCIMISCCTL_CLEAR_INTA|BGE_PCIMISCCTL_MASK_PCI_INTR| \
@@ -221,6 +221,9 @@
#define BGE_ASICREV_BCM5701_B0 0x01000000
#define BGE_ASICREV_BCM5701_B2 0x01020000
#define BGE_ASICREV_BCM5701_B5 0x01050000
+#define BGE_ASICREV_BCM5703_A0 0x10000000
+#define BGE_ASICREV_BCM5703_A1 0x10010000
+#define BGE_ASICREV_BCM5703_A2 0x10020000
/* shorthand one */
#define BGE_ASICREV_BCM5700 0x71000000
@@ -1782,6 +1785,7 @@
#define BCOM_DEVICEID_BCM5700 0x1644
#define BCOM_DEVICEID_BCM5701 0x1645
#define BCOM_DEVICEID_BCM5702X 0x16A6
+#define BCOM_DEVICEID_BCM5703X 0x16A7
/*
* Alteon AceNIC PCI vendor/device ID.
--- src/sys/dev/mii/miidevs.org Thu Apr 11 09:03:27 2002
+++ src/sys/dev/mii/miidevs Thu Oct 10 15:10:59 2002
@@ -109,6 +109,7 @@
model xxBROADCOM BCM5401 0x0005 BCM5401 10/100/1000baseTX PHY
model xxBROADCOM BCM5411 0x0007 BCM5411 10/100/1000baseTX PHY
model xxBROADCOM BCM5701 0x0011 BCM5701 10/100/1000baseTX PHY
+model xxBROADCOM BCM5703 0x0016 BCM5703 10/100/1000baseTX PHY
/* Davicom Semiconductor PHYs */
model xxDAVICOM DM9101 0x0000 DM9101 10/100 media interface
--- src/sys/dev/mii/miidevs.h.org Thu Apr 11 09:04:02 2002
+++ src/sys/dev/mii/miidevs.h Thu Oct 10 15:28:53 2002
@@ -125,6 +125,8 @@
#define MII_STR_xxBROADCOM_BCM5411 "BCM5411 10/100/1000baseTX PHY"
#define MII_MODEL_xxBROADCOM_BCM5701 0x0011
#define MII_STR_xxBROADCOM_BCM5701 "BCM5701 10/100/1000baseTX PHY"
+#define MII_MODEL_xxBROADCOM_BCM5703 0x0016
+#define MII_STR_xxBROADCOM_BCM5703 "BCM5703 10/100/1000baseTX PHY"
/* Davicom Semiconductor PHYs */
#define MII_MODEL_xxDAVICOM_DM9101 0x0000
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