Date: Sat, 8 Jun 2024 07:33:31 GMT From: Li-Wen Hsu <lwhsu@FreeBSD.org> To: ports-committers@FreeBSD.org, dev-commits-ports-all@FreeBSD.org, dev-commits-ports-main@FreeBSD.org Subject: git: 659ccd01e029 - main - emulators/riscv-isa-sim: Update to 2024-05-31 snapshot Message-ID: <202406080733.4587XVWI079755@gitrepo.freebsd.org>
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The branch main has been updated by lwhsu: URL: https://cgit.FreeBSD.org/ports/commit/?id=659ccd01e029ef5bff28efbd44437dbd3b2a47dd commit 659ccd01e029ef5bff28efbd44437dbd3b2a47dd Author: SHENG-YI HONG <aokblast@FreeBSD.org> AuthorDate: 2024-06-08 07:24:34 +0000 Commit: Li-Wen Hsu <lwhsu@FreeBSD.org> CommitDate: 2024-06-08 07:32:36 +0000 emulators/riscv-isa-sim: Update to 2024-05-31 snapshot Reviewed by: mhorne Event: Kitchener-Waterloo Hackathon 202406 Differential Revision: https://reviews.freebsd.org/D43251 --- emulators/riscv-isa-sim/Makefile | 6 +++--- emulators/riscv-isa-sim/distinfo | 6 +++--- emulators/riscv-isa-sim/pkg-plist | 41 ++++++++++++++++++++++++++++++++++++++- 3 files changed, 46 insertions(+), 7 deletions(-) diff --git a/emulators/riscv-isa-sim/Makefile b/emulators/riscv-isa-sim/Makefile index 5d61034efaba..f09501a137e3 100644 --- a/emulators/riscv-isa-sim/Makefile +++ b/emulators/riscv-isa-sim/Makefile @@ -1,6 +1,5 @@ PORTNAME= riscv-isa-sim -DISTVERSION= git -PORTREVISION= 20211015 +DISTVERSION= 1.1.0-20240531 CATEGORIES= emulators MAINTAINER= lwhsu@FreeBSD.org @@ -15,7 +14,7 @@ NOT_FOR_ARCHS_REASON= Does not build USES= compiler:c++11-lang gmake shebangfix GH_ACCOUNT= riscv -GH_TAGNAME= 4f12984 +GH_TAGNAME= 00dfa28 HAS_CONFIGURE= yes CONFIGURE_ARGS= --without-boost @@ -33,6 +32,7 @@ STRIP_FILES= bin/elf2hex \ bin/termios-xspike \ bin/xspike \ lib/libcustomext.so \ + lib/libriscv.so \ lib/libsoftfloat.so post-patch: diff --git a/emulators/riscv-isa-sim/distinfo b/emulators/riscv-isa-sim/distinfo index 0efac5e1e01f..34102001d5aa 100644 --- a/emulators/riscv-isa-sim/distinfo +++ b/emulators/riscv-isa-sim/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1634590527 -SHA256 (riscv-riscv-isa-sim-git-4f12984_GH0.tar.gz) = f9312a39049cb42116bd4b9425c2ad2d89cb746b08fa2d5aba76b1c07e83d320 -SIZE (riscv-riscv-isa-sim-git-4f12984_GH0.tar.gz) = 445499 +TIMESTAMP = 1717831105 +SHA256 (riscv-riscv-isa-sim-1.1.0-20240531-00dfa28_GH0.tar.gz) = 5489098fd67d2d8cfbc714a6e93464ca702125ab0308a523de8528f474a5c80d +SIZE (riscv-riscv-isa-sim-1.1.0-20240531-00dfa28_GH0.tar.gz) = 492848 diff --git a/emulators/riscv-isa-sim/pkg-plist b/emulators/riscv-isa-sim/pkg-plist index 8da738d3812e..818d56ce2167 100644 --- a/emulators/riscv-isa-sim/pkg-plist +++ b/emulators/riscv-isa-sim/pkg-plist @@ -4,6 +4,9 @@ bin/spike-dasm bin/spike-log-parser bin/termios-xspike bin/xspike +include/fdt/fdt.h +include/fdt/libfdt.h +include/fdt/libfdt_env.h include/fesvr/byteorder.h include/fesvr/config.h include/fesvr/context.h @@ -20,10 +23,46 @@ include/fesvr/rfb.h include/fesvr/syscall.h include/fesvr/term.h include/fesvr/tsi.h -include/riscv/mmio_plugin.h +include/riscv/abstract_device.h +include/riscv/abstract_interrupt_controller.h +include/riscv/cachesim.h +include/riscv/cfg.h +include/riscv/common.h +include/riscv/csrs.h +include/riscv/debug_defines.h +include/riscv/debug_module.h +include/riscv/debug_rom_defines.h +include/riscv/decode.h +include/riscv/devices.h +include/riscv/disasm.h +include/riscv/dts.h +include/riscv/encoding.h +include/riscv/entropy_source.h +include/riscv/extension.h +include/riscv/isa_parser.h +include/riscv/log_file.h +include/riscv/memtracer.h +include/riscv/mmu.h +include/riscv/platform.h +include/riscv/processor.h +include/riscv/rocc.h +include/riscv/sim.h +include/riscv/simif.h +include/riscv/trap.h +include/riscv/triggers.h +include/riscv/vector_unit.h +include/softfloat/internals.h +include/softfloat/platform.h +include/softfloat/primitiveTypes.h +include/softfloat/primitives.h +include/softfloat/softfloat.h +include/softfloat/softfloat_types.h +include/softfloat/specialize.h lib/libcustomext.so lib/libdisasm.a lib/libfesvr.a +lib/libriscv.so lib/libsoftfloat.so libdata/pkgconfig/riscv-disasm.pc libdata/pkgconfig/riscv-fesvr.pc +libdata/pkgconfig/riscv-riscv.pc
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