Date: Mon, 25 Aug 2014 22:04:29 +0000 (UTC) From: Jack F Vogel <jfv@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r270631 - in stable/10/sys: conf dev/ixl modules/ixl modules/ixlv Message-ID: <201408252204.s7PM4Tgi062611@svn.freebsd.org>
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Author: jfv Date: Mon Aug 25 22:04:29 2014 New Revision: 270631 URL: http://svnweb.freebsd.org/changeset/base/270631 Log: MFC of the Intel Base driver for the Intel XL710 Ethernet Controller Family - It was decided to change the driver name to if_ixl for FreeBSD - This release adds the VF Driver to the tree, it can be built into the kernel or as the if_ixlv module - The VF driver is independent for the first time, this will be desireable when full SRIOV capability is added to the OS. Submitted by: jack.vogel@intel.com and eric.joyner@intel.com Added: stable/10/sys/dev/ixl/ stable/10/sys/dev/ixl/README (contents, props changed) stable/10/sys/dev/ixl/i40e_adminq.c (contents, props changed) stable/10/sys/dev/ixl/i40e_adminq.h (contents, props changed) stable/10/sys/dev/ixl/i40e_adminq_cmd.h (contents, props changed) stable/10/sys/dev/ixl/i40e_alloc.h (contents, props changed) stable/10/sys/dev/ixl/i40e_common.c (contents, props changed) stable/10/sys/dev/ixl/i40e_hmc.c (contents, props changed) stable/10/sys/dev/ixl/i40e_hmc.h (contents, props changed) stable/10/sys/dev/ixl/i40e_lan_hmc.c (contents, props changed) stable/10/sys/dev/ixl/i40e_lan_hmc.h (contents, props changed) stable/10/sys/dev/ixl/i40e_nvm.c (contents, props changed) stable/10/sys/dev/ixl/i40e_osdep.c (contents, props changed) stable/10/sys/dev/ixl/i40e_osdep.h (contents, props changed) stable/10/sys/dev/ixl/i40e_prototype.h (contents, props changed) stable/10/sys/dev/ixl/i40e_register.h (contents, props changed) stable/10/sys/dev/ixl/i40e_register_x710_int.h (contents, props changed) stable/10/sys/dev/ixl/i40e_status.h (contents, props changed) stable/10/sys/dev/ixl/i40e_type.h (contents, props changed) stable/10/sys/dev/ixl/i40e_virtchnl.h (contents, props changed) stable/10/sys/dev/ixl/if_ixl.c (contents, props changed) stable/10/sys/dev/ixl/if_ixlv.c (contents, props changed) stable/10/sys/dev/ixl/ixl.h (contents, props changed) stable/10/sys/dev/ixl/ixl_pf.h (contents, props changed) stable/10/sys/dev/ixl/ixl_txrx.c (contents, props changed) stable/10/sys/dev/ixl/ixlv.h (contents, props changed) stable/10/sys/dev/ixl/ixlvc.c (contents, props changed) stable/10/sys/modules/ixl/ stable/10/sys/modules/ixl/Makefile (contents, props changed) stable/10/sys/modules/ixlv/ stable/10/sys/modules/ixlv/Makefile (contents, props changed) Modified: stable/10/sys/conf/files Modified: stable/10/sys/conf/files ============================================================================== --- stable/10/sys/conf/files Mon Aug 25 21:21:29 2014 (r270630) +++ stable/10/sys/conf/files Mon Aug 25 22:04:29 2014 (r270631) @@ -1729,6 +1729,26 @@ dev/ixgbe/ixgbe_dcb_82598.c optional ixg compile-with "${NORMAL_C} -I$S/dev/ixgbe" dev/ixgbe/ixgbe_dcb_82599.c optional ixgbe inet \ compile-with "${NORMAL_C} -I$S/dev/ixgbe" +dev/ixl/if_ixl.c optional ixl inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/if_ixlv.c optional ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixlvc.c optional ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/ixl_txrx.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_osdep.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_lan_hmc.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_hmc.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_common.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_nvm.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" +dev/ixl/i40e_adminq.c optional ixl ixlv inet \ + compile-with "${NORMAL_C} -I$S/dev/ixl" dev/jme/if_jme.c optional jme pci dev/joy/joy.c optional joy dev/joy/joy_isa.c optional joy isa Added: stable/10/sys/dev/ixl/README ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/dev/ixl/README Mon Aug 25 22:04:29 2014 (r270631) @@ -0,0 +1,342 @@ +ixl FreeBSD* Base Driver for the Intel® XL710 Ethernet Controller Family + +/*$FreeBSD$*/ +================================================================ + +July 21, 2014 + + +Contents +======== + +- Overview +- Supported Adapters +- Building and Installation +- Additional Configurations +- Known Limitations + + +Overview +======== + +This file describes the IXL FreeBSD* Base driver for the XL710 Ethernet Family of Adapters. The Driver has been developed for use with FreeBSD 10.0 or later, but should be compatible with any supported release. + +For questions related to hardware requirements, refer to the documentation supplied with your Intel XL710 adapter. All hardware requirements listed apply for use with FreeBSD. + + +Supported Adapters +================== + +The driver in this release is compatible with XL710 and X710-based Intel Ethernet Network Connections. + + +SFP+ Devices with Pluggable Optics +---------------------------------- + +SR Modules +---------- + Intel DUAL RATE 1G/10G SFP+ SR (bailed) FTLX8571D3BCV-IT + Intel DUAL RATE 1G/10G SFP+ SR (bailed) AFBR-703SDZ-IN2 + +LR Modules +---------- + Intel DUAL RATE 1G/10G SFP+ LR (bailed) FTLX1471D3BCV-IT + Intel DUAL RATE 1G/10G SFP+ LR (bailed) AFCT-701SDZ-IN2 + +QSFP+ Modules +------------- + Intel TRIPLE RATE 1G/10G/40G QSFP+ SR (bailed) E40GQSFPSR + Intel TRIPLE RATE 1G/10G/40G QSFP+ LR (bailed) E40GQSFPLR + QSFP+ 1G speed is not supported on XL710 based devices. + +X710/XL710 Based SFP+ adapters support all passive and active limiting direct attach cables that comply with SFF-8431 v4.1 and SFF-8472 v10.4 specifications. + + +Building and Installation +========================= + +NOTE: You must have kernel sources installed to compile the driver module. + +In the instructions below, x.x.x is the driver version +as indicated in thename of the driver tar. + +1. Move the base driver tar file to the directory of your choice. For example, use /home/username/ixl or /usr/local/src/ixl. + +2. Untar/unzip the archive: + tar xfz ixl-x.x.x.tar.gz + +3. To install man page: + cd ixl-x.x.x + gzip -c ixl.4 > /usr/share/man/man4/ixl.4.gz + +4. To load the driver onto a running system: + cd ixl-x.x.x/src + make load + +5. To assign an IP address to the interface, enter the following: + ifconfig ixl<interface_num> <IP_address> + +6. Verify that the interface works. Enter the following, where <IP_address> is the IP address for another machine on the same subnet as the interface that is being tested: + + ping <IP_address> + +7. If you want the driver to load automatically when the system is booted: + + cd ixl-x.x.x/src + make + make install + + Edit /boot/loader.conf, and add the following line: + if_ixl_load="YES" + + Edit /etc/rc.conf, and create the appropriate + ifconfig_ixl<interface_num> entry: + + ifconfig_ixl<interface_num>="<ifconfig_settings>" + + Example usage: + + ifconfig_ixl0="inet 192.168.10.1 netmask 255.255.255.0" + + NOTE: For assistance, see the ifconfig man page. + + + +Configuration and Tuning +========================= + +The driver supports Transmit/Receive Checksum Offload for IPv4 and IPv6, +TSO forIPv4 and IPv6, LRO, and Jumbo Frames on all 40 Gigabit adapters. + + Jumbo Frames + ------------ + To enable Jumbo Frames, use the ifconfig utility to increase + the MTU beyond 1500 bytes. + + - The Jumbo Frames setting on the switch must be set to at least + 22 byteslarger than that of the adapter. + + - The maximum MTU setting for Jumbo Frames is 9706. This value + coincides with the maximum jumbo frames size of 9728. + To modify the setting, enter the following: + + ifconfig ixl<interface_num> <hostname or IP address> mtu 9000 + + - To confirm an interface's MTU value, use the ifconfig command. + To confirm the MTU used between two specific devices, use: + + route get <destination_IP_address> + + VLANs + ----- + To create a new VLAN pseudo-interface: + + ifconfig <vlan_name> create + + To associate the VLAN pseudo-interface with a physical interface + and assign a VLAN ID, IP address, and netmask: + + ifconfig <vlan_name> <ip_address> netmask <subnet_mask> vlan + <vlan_id> vlandev <physical_interface> + + Example: + + ifconfig vlan10 10.0.0.1 netmask 255.255.255.0 vlan 10 vlandev ixl0 + + In this example, all packets will be marked on egress with + 802.1Q VLAN tags, specifying a VLAN ID of 10. + + To remove a VLAN pseudo-interface: + + ifconfig <vlan_name> destroy + + + Checksum Offload + ---------------- + + Checksum offloading supports IPv4 and IPv6 with TCP and UDP packets + and is supported for both transmit and receive. Checksum offloading + for transmit and recieve is enabled by default for both IPv4 and IPv6. + + Checksum offloading can be enabled or disabled using ifconfig. + Transmit and receive offloading for IPv4 and Ipv6 are enabled + and disabled seperately. + + NOTE: TSO requires Tx checksum, so when Tx checksum + is disabled, TSO will also be disabled. + + To enable Tx checksum offloading for ipv4: + + ifconfig ixl<interface_num> txcsum4 + + To disable Tx checksum offloading for ipv4: + + ifconfig ixl<interface_num> -txcsum4 + (NOTE: This will disable TSO4) + + To enable Rx checksum offloading for ipv6: + + ifconfig ixl<interface_num> rxcsum6 + + To disable Rx checksum offloading for ipv6: + + ifconfig ixl<interface_num> -rxcsum6 + (NOTE: This will disable TSO6) + + + To confirm the current settings: + + ifconfig ixl<interface_num> + + + TSO + --- + + TSO supports both IPv4 and IPv6 and is enabled by default. TSO can + be disabled and enabled using the ifconfig utility. + + NOTE: TSO requires Tx checksum, so when Tx checksum is + disabled, TSO will also be disabled. + + To disable TSO IPv4: + + ifconfig ixl<interface_num> -tso4 + + To enable TSO IPv4: + + ifconfig ixl<interface_num> tso4 + + To disable TSO IPv6: + + ifconfig ixl<interface_num> -tso6 + + To enable TSO IPv6: + + ifconfig ixl<interface_num> tso6 + + To disable BOTH TSO IPv4 and IPv6: + + ifconfig ixl<interface_num> -tso + + To enable BOTH TSO IPv4 and IPv6: + + ifconfig ixl<interface_num> tso + + + LRO + --- + + Large Receive Offload is enabled by default. It can be enabled + or disabled by using the ifconfig utility. + + NOTE: LRO should be disabled when forwarding packets. + + To disable LRO: + + ifconfig ixl<interface_num> -lro + + To enable LRO: + + ifconfig ixl<interface_num> lro + + +Flow Control +------------ +Flow control is disabled by default. To change flow control settings use sysctl. + +To enable flow control to Rx pause frames: + + sysctl dev.ixl.<interface_num>.fc=1 + +To enable flow control to Tx pause frames: + + sysctl dev.ixl.<interface_num>.fc=2 + +To enable flow control to Rx and Tx pause frames: + + sysctl dev.ixl.<interface_num>.fc=3 + +To disable flow control: + + sysctl dev.ixl.<interface_num>.fc=0 + + +NOTE: You must have a flow control capable link partner. + + + + Important system configuration changes: + ======================================= + + +-Change the file /etc/sysctl.conf, and add the line: + + hw.intr_storm_threshold: 0 (the default is 1000) + +-Best throughput results are seen with a large MTU; use 9706 if possible. + +-The default number of descriptors per ring is 1024, increasing this may improve performance depending on the use case. + + +Known Limitations +================= + +Network Memory Buffer allocation +-------------------------------- + FreeBSD may have a low number of network memory buffers (mbufs) by default. Ifyour mbuf value is too low, it may cause the driver to fail to initialize and/orcause the system to become unresponsive. You can check to see if the system is mbuf-starved by running 'netstat -m'. Increase the number of mbufs by editing the lines below in /etc/sysctl.conf: + + kern.ipc.nmbclusters + kern.ipc.nmbjumbop + kern.ipc.nmbjumbo9 + kern.ipc.nmbjumbo16 + kern.ipc.nmbufs + +The amount of memory that you allocate is system specific, and may require some trial and error. + +Also, increasing the follwing in /etc/sysctl.conf could help increase network performance: + + kern.ipc.maxsockbuf + net.inet.tcp.sendspace + net.inet.tcp.recvspace + net.inet.udp.maxdgram + net.inet.udp.recvspace + + +UDP Stress Test Dropped Packet Issue +------------------------------------ + Under small packet UDP stress test with the ixl driver, the FreeBSD system will drop UDP packets due to the fullness of socket buffers. You may want to change the driver's Flow Control variables to the minimum value for controlling packet reception. + + +Disable LRO when routing/bridging +--------------------------------- +LRO must be turned off when forwarding traffic. + + +Lower than expected performance +------------------------------- + Some PCIe x8 slots are actually configured as x4 slots. These slots have insufficient bandwidth for full line rate with dual port and quad port devices. In addition, if you put a PCIe Generation 3-capable adapter into a PCIe Generation 2 slot, you cannot get full bandwidth. The driver detects this situation and writes the following message in the system log: + + "PCI-Express bandwidth available for this card is not sufficient for optimal performance. For optimal performance a x8 PCI-Express slot is required." + +If this error occurs, moving your adapter to a true PCIe Generation 3 x8 slot will resolve the issue. + + +Support +======= + +For general information and support, go to the Intel support website at: + + http://support.intel.com + +If an issue is identified with the released source code on the supported kernel with a supported adapter, email the specific information related to the issue tofreebsdnic@mailbox.intel.com. + + +License +======= + +This software program is released under the terms of a license agreement betweenyou ('Licensee') and Intel. Do not use or load this software or any associated materials (collectively, the 'Software') until you have carefully read the full terms and conditions of the LICENSE located in this software package. By loadingor using the Software, you agree to the terms of this Agreement. If you do not +agree with the terms of this Agreement, do not install or use the Software. + +* Other names and brands may be claimed as the property of others. + + Added: stable/10/sys/dev/ixl/i40e_adminq.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/dev/ixl/i40e_adminq.c Mon Aug 25 22:04:29 2014 (r270631) @@ -0,0 +1,1070 @@ +/****************************************************************************** + + Copyright (c) 2013-2014, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +******************************************************************************/ +/*$FreeBSD$*/ + +#include "i40e_status.h" +#include "i40e_type.h" +#include "i40e_register.h" +#include "i40e_adminq.h" +#include "i40e_prototype.h" + +/** + * i40e_is_nvm_update_op - return TRUE if this is an NVM update operation + * @desc: API request descriptor + **/ +static INLINE bool i40e_is_nvm_update_op(struct i40e_aq_desc *desc) +{ + return (desc->opcode == CPU_TO_LE16(i40e_aqc_opc_nvm_erase) || + desc->opcode == CPU_TO_LE16(i40e_aqc_opc_nvm_update)); +} + +/** + * i40e_adminq_init_regs - Initialize AdminQ registers + * @hw: pointer to the hardware structure + * + * This assumes the alloc_asq and alloc_arq functions have already been called + **/ +static void i40e_adminq_init_regs(struct i40e_hw *hw) +{ + /* set head and tail registers in our local struct */ + if (i40e_is_vf(hw)) { + hw->aq.asq.tail = I40E_VF_ATQT1; + hw->aq.asq.head = I40E_VF_ATQH1; + hw->aq.asq.len = I40E_VF_ATQLEN1; + hw->aq.asq.bal = I40E_VF_ATQBAL1; + hw->aq.asq.bah = I40E_VF_ATQBAH1; + hw->aq.arq.tail = I40E_VF_ARQT1; + hw->aq.arq.head = I40E_VF_ARQH1; + hw->aq.arq.len = I40E_VF_ARQLEN1; + hw->aq.arq.bal = I40E_VF_ARQBAL1; + hw->aq.arq.bah = I40E_VF_ARQBAH1; + } else { + hw->aq.asq.tail = I40E_PF_ATQT; + hw->aq.asq.head = I40E_PF_ATQH; + hw->aq.asq.len = I40E_PF_ATQLEN; + hw->aq.asq.bal = I40E_PF_ATQBAL; + hw->aq.asq.bah = I40E_PF_ATQBAH; + hw->aq.arq.tail = I40E_PF_ARQT; + hw->aq.arq.head = I40E_PF_ARQH; + hw->aq.arq.len = I40E_PF_ARQLEN; + hw->aq.arq.bal = I40E_PF_ARQBAL; + hw->aq.arq.bah = I40E_PF_ARQBAH; + } +} + +/** + * i40e_alloc_adminq_asq_ring - Allocate Admin Queue send rings + * @hw: pointer to the hardware structure + **/ +enum i40e_status_code i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code; + + ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, + i40e_mem_atq_ring, + (hw->aq.num_asq_entries * + sizeof(struct i40e_aq_desc)), + I40E_ADMINQ_DESC_ALIGNMENT); + if (ret_code) + return ret_code; + + ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, + (hw->aq.num_asq_entries * + sizeof(struct i40e_asq_cmd_details))); + if (ret_code) { + i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); + return ret_code; + } + + return ret_code; +} + +/** + * i40e_alloc_adminq_arq_ring - Allocate Admin Queue receive rings + * @hw: pointer to the hardware structure + **/ +enum i40e_status_code i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code; + + ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, + i40e_mem_arq_ring, + (hw->aq.num_arq_entries * + sizeof(struct i40e_aq_desc)), + I40E_ADMINQ_DESC_ALIGNMENT); + + return ret_code; +} + +/** + * i40e_free_adminq_asq - Free Admin Queue send rings + * @hw: pointer to the hardware structure + * + * This assumes the posted send buffers have already been cleaned + * and de-allocated + **/ +void i40e_free_adminq_asq(struct i40e_hw *hw) +{ + i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); +} + +/** + * i40e_free_adminq_arq - Free Admin Queue receive rings + * @hw: pointer to the hardware structure + * + * This assumes the posted receive buffers have already been cleaned + * and de-allocated + **/ +void i40e_free_adminq_arq(struct i40e_hw *hw) +{ + i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); +} + +/** + * i40e_alloc_arq_bufs - Allocate pre-posted buffers for the receive queue + * @hw: pointer to the hardware structure + **/ +static enum i40e_status_code i40e_alloc_arq_bufs(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code; + struct i40e_aq_desc *desc; + struct i40e_dma_mem *bi; + int i; + + /* We'll be allocating the buffer info memory first, then we can + * allocate the mapped buffers for the event processing + */ + + /* buffer_info structures do not need alignment */ + ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, + (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); + if (ret_code) + goto alloc_arq_bufs; + hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; + + /* allocate the mapped buffers */ + for (i = 0; i < hw->aq.num_arq_entries; i++) { + bi = &hw->aq.arq.r.arq_bi[i]; + ret_code = i40e_allocate_dma_mem(hw, bi, + i40e_mem_arq_buf, + hw->aq.arq_buf_size, + I40E_ADMINQ_DESC_ALIGNMENT); + if (ret_code) + goto unwind_alloc_arq_bufs; + + /* now configure the descriptors for use */ + desc = I40E_ADMINQ_DESC(hw->aq.arq, i); + + desc->flags = CPU_TO_LE16(I40E_AQ_FLAG_BUF); + if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) + desc->flags |= CPU_TO_LE16(I40E_AQ_FLAG_LB); + desc->opcode = 0; + /* This is in accordance with Admin queue design, there is no + * register for buffer size configuration + */ + desc->datalen = CPU_TO_LE16((u16)bi->size); + desc->retval = 0; + desc->cookie_high = 0; + desc->cookie_low = 0; + desc->params.external.addr_high = + CPU_TO_LE32(I40E_HI_DWORD(bi->pa)); + desc->params.external.addr_low = + CPU_TO_LE32(I40E_LO_DWORD(bi->pa)); + desc->params.external.param0 = 0; + desc->params.external.param1 = 0; + } + +alloc_arq_bufs: + return ret_code; + +unwind_alloc_arq_bufs: + /* don't try to free the one that failed... */ + i--; + for (; i >= 0; i--) + i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); + i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); + + return ret_code; +} + +/** + * i40e_alloc_asq_bufs - Allocate empty buffer structs for the send queue + * @hw: pointer to the hardware structure + **/ +static enum i40e_status_code i40e_alloc_asq_bufs(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code; + struct i40e_dma_mem *bi; + int i; + + /* No mapped memory needed yet, just the buffer info structures */ + ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, + (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); + if (ret_code) + goto alloc_asq_bufs; + hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; + + /* allocate the mapped buffers */ + for (i = 0; i < hw->aq.num_asq_entries; i++) { + bi = &hw->aq.asq.r.asq_bi[i]; + ret_code = i40e_allocate_dma_mem(hw, bi, + i40e_mem_asq_buf, + hw->aq.asq_buf_size, + I40E_ADMINQ_DESC_ALIGNMENT); + if (ret_code) + goto unwind_alloc_asq_bufs; + } +alloc_asq_bufs: + return ret_code; + +unwind_alloc_asq_bufs: + /* don't try to free the one that failed... */ + i--; + for (; i >= 0; i--) + i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); + i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); + + return ret_code; +} + +/** + * i40e_free_arq_bufs - Free receive queue buffer info elements + * @hw: pointer to the hardware structure + **/ +static void i40e_free_arq_bufs(struct i40e_hw *hw) +{ + int i; + + /* free descriptors */ + for (i = 0; i < hw->aq.num_arq_entries; i++) + i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); + + /* free the descriptor memory */ + i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); + + /* free the dma header */ + i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); +} + +/** + * i40e_free_asq_bufs - Free send queue buffer info elements + * @hw: pointer to the hardware structure + **/ +static void i40e_free_asq_bufs(struct i40e_hw *hw) +{ + int i; + + /* only unmap if the address is non-NULL */ + for (i = 0; i < hw->aq.num_asq_entries; i++) + if (hw->aq.asq.r.asq_bi[i].pa) + i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); + + /* free the buffer info list */ + i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); + + /* free the descriptor memory */ + i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); + + /* free the dma header */ + i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); +} + +/** + * i40e_config_asq_regs - configure ASQ registers + * @hw: pointer to the hardware structure + * + * Configure base address and length registers for the transmit queue + **/ +static enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + u32 reg = 0; + + /* Clear Head and Tail */ + wr32(hw, hw->aq.asq.head, 0); + wr32(hw, hw->aq.asq.tail, 0); + + /* set starting point */ + wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | + I40E_PF_ATQLEN_ATQENABLE_MASK)); + wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa)); + wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa)); + + /* Check one register to verify that config was applied */ + reg = rd32(hw, hw->aq.asq.bal); + if (reg != I40E_LO_DWORD(hw->aq.asq.desc_buf.pa)) + ret_code = I40E_ERR_ADMIN_QUEUE_ERROR; + + return ret_code; +} + +/** + * i40e_config_arq_regs - ARQ register configuration + * @hw: pointer to the hardware structure + * + * Configure base address and length registers for the receive (event queue) + **/ +static enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + u32 reg = 0; + + /* Clear Head and Tail */ + wr32(hw, hw->aq.arq.head, 0); + wr32(hw, hw->aq.arq.tail, 0); + + /* set starting point */ + wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | + I40E_PF_ARQLEN_ARQENABLE_MASK)); + wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa)); + wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa)); + + /* Update tail in the HW to post pre-allocated buffers */ + wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); + + /* Check one register to verify that config was applied */ + reg = rd32(hw, hw->aq.arq.bal); + if (reg != I40E_LO_DWORD(hw->aq.arq.desc_buf.pa)) + ret_code = I40E_ERR_ADMIN_QUEUE_ERROR; + + return ret_code; +} + +/** + * i40e_init_asq - main initialization routine for ASQ + * @hw: pointer to the hardware structure + * + * This is the main initialization routine for the Admin Send Queue + * Prior to calling this function, drivers *MUST* set the following fields + * in the hw->aq structure: + * - hw->aq.num_asq_entries + * - hw->aq.arq_buf_size + * + * Do *NOT* hold the lock when calling this as the memory allocation routines + * called are not going to be atomic context safe + **/ +enum i40e_status_code i40e_init_asq(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + + if (hw->aq.asq.count > 0) { + /* queue already initialized */ + ret_code = I40E_ERR_NOT_READY; + goto init_adminq_exit; + } + + /* verify input for valid configuration */ + if ((hw->aq.num_asq_entries == 0) || + (hw->aq.asq_buf_size == 0)) { + ret_code = I40E_ERR_CONFIG; + goto init_adminq_exit; + } + + hw->aq.asq.next_to_use = 0; + hw->aq.asq.next_to_clean = 0; + hw->aq.asq.count = hw->aq.num_asq_entries; + + /* allocate the ring memory */ + ret_code = i40e_alloc_adminq_asq_ring(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_exit; + + /* allocate buffers in the rings */ + ret_code = i40e_alloc_asq_bufs(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_free_rings; + + /* initialize base registers */ + ret_code = i40e_config_asq_regs(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_free_rings; + + /* success! */ + goto init_adminq_exit; + +init_adminq_free_rings: + i40e_free_adminq_asq(hw); + +init_adminq_exit: + return ret_code; +} + +/** + * i40e_init_arq - initialize ARQ + * @hw: pointer to the hardware structure + * + * The main initialization routine for the Admin Receive (Event) Queue. + * Prior to calling this function, drivers *MUST* set the following fields + * in the hw->aq structure: + * - hw->aq.num_asq_entries + * - hw->aq.arq_buf_size + * + * Do *NOT* hold the lock when calling this as the memory allocation routines + * called are not going to be atomic context safe + **/ +enum i40e_status_code i40e_init_arq(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + + if (hw->aq.arq.count > 0) { + /* queue already initialized */ + ret_code = I40E_ERR_NOT_READY; + goto init_adminq_exit; + } + + /* verify input for valid configuration */ + if ((hw->aq.num_arq_entries == 0) || + (hw->aq.arq_buf_size == 0)) { + ret_code = I40E_ERR_CONFIG; + goto init_adminq_exit; + } + + hw->aq.arq.next_to_use = 0; + hw->aq.arq.next_to_clean = 0; + hw->aq.arq.count = hw->aq.num_arq_entries; + + /* allocate the ring memory */ + ret_code = i40e_alloc_adminq_arq_ring(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_exit; + + /* allocate buffers in the rings */ + ret_code = i40e_alloc_arq_bufs(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_free_rings; + + /* initialize base registers */ + ret_code = i40e_config_arq_regs(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_free_rings; + + /* success! */ + goto init_adminq_exit; + +init_adminq_free_rings: + i40e_free_adminq_arq(hw); + +init_adminq_exit: + return ret_code; +} + +/** + * i40e_shutdown_asq - shutdown the ASQ + * @hw: pointer to the hardware structure + * + * The main shutdown routine for the Admin Send Queue + **/ +enum i40e_status_code i40e_shutdown_asq(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + + if (hw->aq.asq.count == 0) + return I40E_ERR_NOT_READY; + + /* Stop firmware AdminQ processing */ + wr32(hw, hw->aq.asq.head, 0); + wr32(hw, hw->aq.asq.tail, 0); + wr32(hw, hw->aq.asq.len, 0); + wr32(hw, hw->aq.asq.bal, 0); + wr32(hw, hw->aq.asq.bah, 0); + + /* make sure spinlock is available */ + i40e_acquire_spinlock(&hw->aq.asq_spinlock); + + hw->aq.asq.count = 0; /* to indicate uninitialized queue */ + + /* free ring buffers */ + i40e_free_asq_bufs(hw); + + i40e_release_spinlock(&hw->aq.asq_spinlock); + + return ret_code; +} + +/** + * i40e_shutdown_arq - shutdown ARQ + * @hw: pointer to the hardware structure + * + * The main shutdown routine for the Admin Receive Queue + **/ +enum i40e_status_code i40e_shutdown_arq(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code = I40E_SUCCESS; + + if (hw->aq.arq.count == 0) + return I40E_ERR_NOT_READY; + + /* Stop firmware AdminQ processing */ + wr32(hw, hw->aq.arq.head, 0); + wr32(hw, hw->aq.arq.tail, 0); + wr32(hw, hw->aq.arq.len, 0); + wr32(hw, hw->aq.arq.bal, 0); + wr32(hw, hw->aq.arq.bah, 0); + + /* make sure spinlock is available */ + i40e_acquire_spinlock(&hw->aq.arq_spinlock); + + hw->aq.arq.count = 0; /* to indicate uninitialized queue */ + + /* free ring buffers */ + i40e_free_arq_bufs(hw); + + i40e_release_spinlock(&hw->aq.arq_spinlock); + + return ret_code; +} + +/** + * i40e_init_adminq - main initialization routine for Admin Queue + * @hw: pointer to the hardware structure + * + * Prior to calling this function, drivers *MUST* set the following fields + * in the hw->aq structure: + * - hw->aq.num_asq_entries + * - hw->aq.num_arq_entries + * - hw->aq.arq_buf_size + * - hw->aq.asq_buf_size + **/ +enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) +{ + enum i40e_status_code ret_code; + u16 eetrack_lo, eetrack_hi; + int retry = 0; + /* verify input for valid configuration */ + if ((hw->aq.num_arq_entries == 0) || + (hw->aq.num_asq_entries == 0) || + (hw->aq.arq_buf_size == 0) || + (hw->aq.asq_buf_size == 0)) { + ret_code = I40E_ERR_CONFIG; + goto init_adminq_exit; + } + + /* initialize spin locks */ + i40e_init_spinlock(&hw->aq.asq_spinlock); + i40e_init_spinlock(&hw->aq.arq_spinlock); + + /* Set up register offsets */ + i40e_adminq_init_regs(hw); + + /* setup ASQ command write back timeout */ + hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; + + /* allocate the ASQ */ + ret_code = i40e_init_asq(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_destroy_spinlocks; + + /* allocate the ARQ */ + ret_code = i40e_init_arq(hw); + if (ret_code != I40E_SUCCESS) + goto init_adminq_free_asq; + + if (i40e_is_vf(hw)) /* VF has no need of firmware */ + goto init_adminq_exit; + +/* There are some cases where the firmware may not be quite ready + * for AdminQ operations, so we retry the AdminQ setup a few times + * if we see timeouts in this first AQ call. + */ + do { + ret_code = i40e_aq_get_firmware_version(hw, + &hw->aq.fw_maj_ver, + &hw->aq.fw_min_ver, + &hw->aq.api_maj_ver, + &hw->aq.api_min_ver, + NULL); + if (ret_code != I40E_ERR_ADMIN_QUEUE_TIMEOUT) + break; + retry++; + i40e_msec_delay(100); + i40e_resume_aq(hw); + } while (retry < 10); + if (ret_code != I40E_SUCCESS) + goto init_adminq_free_arq; + + /* get the NVM version info */ + i40e_read_nvm_word(hw, I40E_SR_NVM_IMAGE_VERSION, &hw->nvm.version); + i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo); + i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi); + hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo; + + if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) { + ret_code = I40E_ERR_FIRMWARE_API_VERSION; + goto init_adminq_free_arq; *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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