Date: Tue, 20 Apr 2010 21:37:47 +0000 (UTC) From: Weongyo Jeong <weongyo@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r206932 - stable/8/sys/dev/siba Message-ID: <201004202137.o3KLblpm051775@svn.freebsd.org>
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Author: weongyo Date: Tue Apr 20 21:37:47 2010 New Revision: 206932 URL: http://svn.freebsd.org/changeset/base/206932 Log: MFC r203944: supports SPROM rev8 informations properly which are used to support low-power PHY of bwn(4) and LDO voltage adjustments. Modified: stable/8/sys/dev/siba/siba_core.c stable/8/sys/dev/siba/sibareg.h stable/8/sys/dev/siba/sibavar.h Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/dev/uath/ (props changed) stable/8/sys/contrib/pf/ (props changed) stable/8/sys/dev/siba/siba_cc.c (props changed) stable/8/sys/dev/xen/xenpci/ (props changed) stable/8/sys/geom/sched/ (props changed) Modified: stable/8/sys/dev/siba/siba_core.c ============================================================================== --- stable/8/sys/dev/siba/siba_core.c Tue Apr 20 21:35:48 2010 (r206931) +++ stable/8/sys/dev/siba/siba_core.c Tue Apr 20 21:37:47 2010 (r206932) @@ -1457,6 +1457,9 @@ siba_crc8(uint8_t crc, uint8_t data) (((__x) & (__mask)) / SIBA_LOWEST_SET_BIT(__mask)) #define SIBA_SHIFTOUT(_var, _offset, _mask) \ out->_var = SIBA_SHIFTOUT_SUB(in[SIBA_OFFSET(_offset)], (_mask)) +#define SIBA_SHIFTOUT_4(_var, _offset, _mask, _shift) \ + out->_var = ((((uint32_t)in[SIBA_OFFSET((_offset)+2)] << 16 | \ + in[SIBA_OFFSET(_offset)]) & (_mask)) >> (_shift)) static void siba_sprom_r123(struct siba_sprom *out, const uint16_t *in) @@ -1511,6 +1514,7 @@ siba_sprom_r123(struct siba_sprom *out, SIBA_SHIFTOUT(gpio1, SIBA_SPROM1_GPIOA, SIBA_SPROM1_GPIOA_P1); SIBA_SHIFTOUT(gpio2, SIBA_SPROM1_GPIOB, SIBA_SPROM1_GPIOB_P2); SIBA_SHIFTOUT(gpio3, SIBA_SPROM1_GPIOB, SIBA_SPROM1_GPIOB_P3); + SIBA_SHIFTOUT(maxpwr_a, SIBA_SPROM1_MAXPWR, SIBA_SPROM1_MAXPWR_A); SIBA_SHIFTOUT(maxpwr_bg, SIBA_SPROM1_MAXPWR, SIBA_SPROM1_MAXPWR_BG); SIBA_SHIFTOUT(tssi_a, SIBA_SPROM1_TSSI, SIBA_SPROM1_TSSI_A); @@ -1587,22 +1591,61 @@ siba_sprom_r8(struct siba_sprom *out, co uint16_t v; for (i = 0; i < 3; i++) { - v = in[SIBA_OFFSET(SIBA_SPROM1_MAC_80211BG) + i]; + v = in[SIBA_OFFSET(SIBA_SPROM8_MAC_80211BG) + i]; *(((uint16_t *)out->mac_80211bg) + i) = htobe16(v); } SIBA_SHIFTOUT(ccode, SIBA_SPROM8_CCODE, 0xffff); SIBA_SHIFTOUT(bf_lo, SIBA_SPROM8_BFLOW, 0xffff); SIBA_SHIFTOUT(bf_hi, SIBA_SPROM8_BFHIGH, 0xffff); + SIBA_SHIFTOUT(bf2_lo, SIBA_SPROM8_BFL2LO, 0xffff); + SIBA_SHIFTOUT(bf2_hi, SIBA_SPROM8_BFL2HI, 0xffff); SIBA_SHIFTOUT(ant_a, SIBA_SPROM8_ANTAVAIL, SIBA_SPROM8_ANTAVAIL_A); SIBA_SHIFTOUT(ant_bg, SIBA_SPROM8_ANTAVAIL, SIBA_SPROM8_ANTAVAIL_BG); SIBA_SHIFTOUT(maxpwr_bg, SIBA_SPROM8_MAXP_BG, SIBA_SPROM8_MAXP_BG_MASK); SIBA_SHIFTOUT(tssi_bg, SIBA_SPROM8_MAXP_BG, SIBA_SPROM8_TSSI_BG); SIBA_SHIFTOUT(maxpwr_a, SIBA_SPROM8_MAXP_A, SIBA_SPROM8_MAXP_A_MASK); SIBA_SHIFTOUT(tssi_a, SIBA_SPROM8_MAXP_A, SIBA_SPROM8_TSSI_A); + SIBA_SHIFTOUT(maxpwr_ah, SIBA_SPROM8_MAXP_AHL, + SIBA_SPROM8_MAXP_AH_MASK); + SIBA_SHIFTOUT(maxpwr_al, SIBA_SPROM8_MAXP_AHL, + SIBA_SPROM8_MAXP_AL_MASK); SIBA_SHIFTOUT(gpio0, SIBA_SPROM8_GPIOA, SIBA_SPROM8_GPIOA_P0); SIBA_SHIFTOUT(gpio1, SIBA_SPROM8_GPIOA, SIBA_SPROM8_GPIOA_P1); SIBA_SHIFTOUT(gpio2, SIBA_SPROM8_GPIOB, SIBA_SPROM8_GPIOB_P2); SIBA_SHIFTOUT(gpio3, SIBA_SPROM8_GPIOB, SIBA_SPROM8_GPIOB_P3); + SIBA_SHIFTOUT(tri2g, SIBA_SPROM8_TRI25G, SIBA_SPROM8_TRI2G); + SIBA_SHIFTOUT(tri5g, SIBA_SPROM8_TRI25G, SIBA_SPROM8_TRI5G); + SIBA_SHIFTOUT(tri5gl, SIBA_SPROM8_TRI5GHL, SIBA_SPROM8_TRI5GL); + SIBA_SHIFTOUT(tri5gh, SIBA_SPROM8_TRI5GHL, SIBA_SPROM8_TRI5GH); + SIBA_SHIFTOUT(rxpo2g, SIBA_SPROM8_RXPO, SIBA_SPROM8_RXPO2G); + SIBA_SHIFTOUT(rxpo5g, SIBA_SPROM8_RXPO, SIBA_SPROM8_RXPO5G); + SIBA_SHIFTOUT(rssismf2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_RSSISMF2G); + SIBA_SHIFTOUT(rssismc2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_RSSISMC2G); + SIBA_SHIFTOUT(rssisav2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_RSSISAV2G); + SIBA_SHIFTOUT(bxa2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_BXA2G); + SIBA_SHIFTOUT(rssismf5g, SIBA_SPROM8_RSSIPARM5G, SIBA_SPROM8_RSSISMF5G); + SIBA_SHIFTOUT(rssismc5g, SIBA_SPROM8_RSSIPARM5G, SIBA_SPROM8_RSSISMC5G); + SIBA_SHIFTOUT(rssisav5g, SIBA_SPROM8_RSSIPARM5G, SIBA_SPROM8_RSSISAV5G); + SIBA_SHIFTOUT(bxa5g, SIBA_SPROM8_RSSIPARM5G, SIBA_SPROM8_BXA5G); + + SIBA_SHIFTOUT(pa0b0, SIBA_SPROM8_PA0B0, 0xffff); + SIBA_SHIFTOUT(pa0b1, SIBA_SPROM8_PA0B1, 0xffff); + SIBA_SHIFTOUT(pa0b2, SIBA_SPROM8_PA0B2, 0xffff); + SIBA_SHIFTOUT(pa1b0, SIBA_SPROM8_PA1B0, 0xffff); + SIBA_SHIFTOUT(pa1b1, SIBA_SPROM8_PA1B1, 0xffff); + SIBA_SHIFTOUT(pa1b2, SIBA_SPROM8_PA1B2, 0xffff); + SIBA_SHIFTOUT(pa1lob0, SIBA_SPROM8_PA1LOB0, 0xffff); + SIBA_SHIFTOUT(pa1lob1, SIBA_SPROM8_PA1LOB1, 0xffff); + SIBA_SHIFTOUT(pa1lob2, SIBA_SPROM8_PA1LOB2, 0xffff); + SIBA_SHIFTOUT(pa1hib0, SIBA_SPROM8_PA1HIB0, 0xffff); + SIBA_SHIFTOUT(pa1hib1, SIBA_SPROM8_PA1HIB1, 0xffff); + SIBA_SHIFTOUT(pa1hib2, SIBA_SPROM8_PA1HIB2, 0xffff); + SIBA_SHIFTOUT(cck2gpo, SIBA_SPROM8_CCK2GPO, 0xffff); + + SIBA_SHIFTOUT_4(ofdm2gpo, SIBA_SPROM8_OFDM2GPO, 0xffffffff, 0); + SIBA_SHIFTOUT_4(ofdm5glpo, SIBA_SPROM8_OFDM5GLPO, 0xffffffff, 0); + SIBA_SHIFTOUT_4(ofdm5gpo, SIBA_SPROM8_OFDM5GPO, 0xffffffff, 0); + SIBA_SHIFTOUT_4(ofdm5ghpo, SIBA_SPROM8_OFDM5GHPO, 0xffffffff, 0); /* antenna gain */ SIBA_SHIFTOUT(again.ghz24.a0, SIBA_SPROM8_AGAIN01, SIBA_SPROM8_AGAIN0); @@ -2005,3 +2048,79 @@ siba_core_resume(struct siba_softc *siba return (0); } + +static void +siba_cc_regctl_setmask(struct siba_cc *cc, uint32_t offset, uint32_t mask, + uint32_t set) +{ + + SIBA_CC_READ32(cc, SIBA_CC_REGCTL_ADDR); + SIBA_CC_WRITE32(cc, SIBA_CC_REGCTL_ADDR, offset); + SIBA_CC_READ32(cc, SIBA_CC_REGCTL_ADDR); + SIBA_CC_WRITE32(cc, SIBA_CC_REGCTL_DATA, + (SIBA_CC_READ32(cc, SIBA_CC_REGCTL_DATA) & mask) | set); + SIBA_CC_READ32(cc, SIBA_CC_REGCTL_DATA); +} + +void +siba_cc_pmu_set_ldovolt(struct siba_cc *scc, int id, uint32_t volt) +{ + struct siba_softc *siba = scc->scc_dev->sd_bus; + uint32_t *p = NULL, info[5][3] = { + { 2, 25, 0xf }, + { 3, 1, 0xf }, + { 3, 9, 0xf }, + { 3, 17, 0x3f }, + { 0, 21, 0x3f } + }; + + if (siba->siba_chipid == 0x4312) { + if (id != SIBA_LDO_PAREF) + return; + p = info[4]; + siba_cc_regctl_setmask(scc, p[0], ~(p[2] << p[1]), + (volt & p[2]) << p[1]); + return; + } + if (siba->siba_chipid == 0x4328 || siba->siba_chipid == 0x5354) { + switch (id) { + case SIBA_LDO_PAREF: + p = info[3]; + break; + case SIBA_LDO_VOLT1: + p = info[0]; + break; + case SIBA_LDO_VOLT2: + p = info[1]; + break; + case SIBA_LDO_VOLT3: + p = info[2]; + break; + default: + KASSERT(0 == 1, + ("%s: unsupported voltage ID %#x", __func__, id)); + return; + } + siba_cc_regctl_setmask(scc, p[0], ~(p[2] << p[1]), + (volt & p[2]) << p[1]); + } +} + +void +siba_cc_pmu_set_ldoparef(struct siba_cc *scc, uint8_t on) +{ + struct siba_softc *siba = scc->scc_dev->sd_bus; + int ldo; + + ldo = ((siba->siba_chipid == 0x4312) ? SIBA_CC_PMU_4312_PA_REF : + ((siba->siba_chipid == 0x4328) ? SIBA_CC_PMU_4328_PA_REF : + ((siba->siba_chipid == 0x5354) ? SIBA_CC_PMU_5354_PA_REF : -1))); + if (ldo == -1) + return; + + if (on) + SIBA_CC_SET32(scc, SIBA_CC_PMU_MINRES, 1 << ldo); + else + SIBA_CC_MASK32(scc, SIBA_CC_PMU_MINRES, ~(1 << ldo)); + SIBA_CC_READ32(scc, SIBA_CC_PMU_MINRES); +} Modified: stable/8/sys/dev/siba/sibareg.h ============================================================================== --- stable/8/sys/dev/siba/sibareg.h Tue Apr 20 21:35:48 2010 (r206931) +++ stable/8/sys/dev/siba/sibareg.h Tue Apr 20 21:37:47 2010 (r206932) @@ -32,7 +32,7 @@ */ #ifndef _SIBA_SIBAREG_H_ -#define _SIBA_SIBAREG_H_ +#define _SIBA_SIBAREG_H_ #define PCI_DEVICE_ID_BCM4401 0x4401 #define PCI_DEVICE_ID_BCM4401B0 0x4402 @@ -92,6 +92,8 @@ #define SIBA_CC_PMU_TABSEL 0x0620 #define SIBA_CC_PMU_DEPMSK 0x0624 #define SIBA_CC_PMU_UPDNTM 0x0628 +#define SIBA_CC_REGCTL_ADDR 0x0658 +#define SIBA_CC_REGCTL_DATA 0x065c #define SIBA_CC_PLLCTL_ADDR 0x0660 #define SIBA_CC_PLLCTL_DATA 0x0664 @@ -148,6 +150,7 @@ { 38400, 13, 45, 873813, }, { 40000, 14, 45, 0, }, \ } +#define SIBA_CC_PMU_4312_PA_REF 2 #define SIBA_CC_PMU_4325_BURST 1 #define SIBA_CC_PMU_4325_CLBURST 3 #define SIBA_CC_PMU_4325_LN 10 @@ -178,6 +181,7 @@ #define SIBA_CC_PMU_4328_BB_PLL_FILTBYP 17 #define SIBA_CC_PMU_4328_RF_PLL_FILTBYP 18 #define SIBA_CC_PMU_4328_BB_PLL_PU 19 +#define SIBA_CC_PMU_5354_PA_REF 8 #define SIBA_CC_PMU_5354_BB_PLL_PU 19 #define SIBA_CC_PMU_4325_RES_UPDOWN \ @@ -237,9 +241,9 @@ #define SIBA_REGWIN(x) \ (SIBA_ENUM_START + ((x) * SIBA_CORE_LEN)) -#define SIBA_CORE_LEN 0x00001000 /* Size of cfg per core */ -#define SIBA_CFG_END 0x00010000 /* Upper bound of cfg space */ -#define SIBA_MAX_CORES (SIBA_CFG_END/SIBA_CORE_LEN) /* #max cores */ +#define SIBA_CORE_LEN 0x00001000 /* Size of cfg per core */ +#define SIBA_CFG_END 0x00010000 /* Upper bound of cfg space */ +#define SIBA_MAX_CORES (SIBA_CFG_END/SIBA_CORE_LEN) /* #max cores */ #define SIBA_ENUM_START 0x18000000U #define SIBA_ENUM_END 0x18010000U @@ -372,6 +376,9 @@ #define SIBA_SPROM5_GPIOB_P3 0xff00 #define SIBA_SPROM8_BFLOW 0x1084 #define SIBA_SPROM8_BFHIGH 0x1086 +#define SIBA_SPROM8_BFL2LO 0x1088 +#define SIBA_SPROM8_BFL2HI 0x108a +#define SIBA_SPROM8_MAC_80211BG 0x108c #define SIBA_SPROM8_CCODE 0x1092 #define SIBA_SPROM8_ANTAVAIL 0x109c #define SIBA_SPROM8_ANTAVAIL_A 0xff00 @@ -379,21 +386,60 @@ #define SIBA_SPROM8_AGAIN01 0x109e #define SIBA_SPROM8_AGAIN0 0x00ff #define SIBA_SPROM8_AGAIN1 0xff00 -#define SIBA_SPROM8_AGAIN23 0x10a0 -#define SIBA_SPROM8_AGAIN2 0x00ff -#define SIBA_SPROM8_AGAIN3 0xff00 #define SIBA_SPROM8_GPIOA 0x1096 #define SIBA_SPROM8_GPIOA_P0 0x00ff #define SIBA_SPROM8_GPIOA_P1 0xff00 #define SIBA_SPROM8_GPIOB 0x1098 #define SIBA_SPROM8_GPIOB_P2 0x00ff #define SIBA_SPROM8_GPIOB_P3 0xff00 +#define SIBA_SPROM8_AGAIN23 0x10a0 +#define SIBA_SPROM8_AGAIN2 0x00ff +#define SIBA_SPROM8_AGAIN3 0xff00 +#define SIBA_SPROM8_RSSIPARM2G 0x10a4 +#define SIBA_SPROM8_RSSISMF2G 0x000f +#define SIBA_SPROM8_RSSISMC2G 0x00f0 +#define SIBA_SPROM8_RSSISAV2G 0x0700 /* BITMASK */ +#define SIBA_SPROM8_BXA2G 0x1800 /* BITMASK */ +#define SIBA_SPROM8_RSSIPARM5G 0x10a6 +#define SIBA_SPROM8_RSSISMF5G 0x000f +#define SIBA_SPROM8_RSSISMC5G 0x00f0 +#define SIBA_SPROM8_RSSISAV5G 0x0700 /* BITMASK */ +#define SIBA_SPROM8_BXA5G 0x1800 /* BITMASK */ +#define SIBA_SPROM8_TRI25G 0x10a8 +#define SIBA_SPROM8_TRI2G 0x00ff +#define SIBA_SPROM8_TRI5G 0xff00 +#define SIBA_SPROM8_TRI5GHL 0x10aa +#define SIBA_SPROM8_TRI5GL 0x00ff +#define SIBA_SPROM8_TRI5GH 0xff00 +#define SIBA_SPROM8_RXPO 0x10ac +#define SIBA_SPROM8_RXPO2G 0x00ff +#define SIBA_SPROM8_RXPO5G 0xff00 #define SIBA_SPROM8_MAXP_BG 0x10c0 #define SIBA_SPROM8_MAXP_BG_MASK 0x00ff #define SIBA_SPROM8_TSSI_BG 0xff00 +#define SIBA_SPROM8_PA0B0 0x10c2 +#define SIBA_SPROM8_PA0B1 0x10c4 +#define SIBA_SPROM8_PA0B2 0x10c6 #define SIBA_SPROM8_MAXP_A 0x10c8 #define SIBA_SPROM8_MAXP_A_MASK 0x00ff #define SIBA_SPROM8_TSSI_A 0xff00 +#define SIBA_SPROM8_MAXP_AHL 0x10ca +#define SIBA_SPROM8_MAXP_AH_MASK 0x00ff +#define SIBA_SPROM8_MAXP_AL_MASK 0xff00 +#define SIBA_SPROM8_PA1B0 0x10cc +#define SIBA_SPROM8_PA1B1 0x10ce +#define SIBA_SPROM8_PA1B2 0x10d0 +#define SIBA_SPROM8_PA1LOB0 0x10d2 +#define SIBA_SPROM8_PA1LOB1 0x10d4 +#define SIBA_SPROM8_PA1LOB2 0x10d6 +#define SIBA_SPROM8_PA1HIB0 0x10d8 +#define SIBA_SPROM8_PA1HIB1 0x10da +#define SIBA_SPROM8_PA1HIB2 0x10dc +#define SIBA_SPROM8_CCK2GPO 0x1140 +#define SIBA_SPROM8_OFDM2GPO 0x1142 +#define SIBA_SPROM8_OFDM5GPO 0x1146 +#define SIBA_SPROM8_OFDM5GLPO 0x114a +#define SIBA_SPROM8_OFDM5GHPO 0x114e #define SIBA_BOARDVENDOR_DELL 0x1028 #define SIBA_BOARDVENDOR_BCM 0x14e4 @@ -413,4 +459,6 @@ #define SIBA_PCICORE_SBTOPCI_BURST 0x00000008 #define SIBA_PCICORE_SBTOPCI_MRM 0x00000020 +#define SIBA_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ + #endif /* _SIBA_SIBAREG_H_ */ Modified: stable/8/sys/dev/siba/sibavar.h ============================================================================== --- stable/8/sys/dev/siba/sibavar.h Tue Apr 20 21:35:48 2010 (r206931) +++ stable/8/sys/dev/siba/sibavar.h Tue Apr 20 21:37:47 2010 (r206932) @@ -214,16 +214,46 @@ struct siba_sprom { uint16_t pa1b0; uint16_t pa1b1; uint16_t pa1b2; + uint16_t pa1lob0; + uint16_t pa1lob1; + uint16_t pa1lob2; + uint16_t pa1hib0; + uint16_t pa1hib1; + uint16_t pa1hib2; uint8_t gpio0; uint8_t gpio1; uint8_t gpio2; uint8_t gpio3; + uint16_t maxpwr_al; uint16_t maxpwr_a; /* A-PHY Max Power */ + uint16_t maxpwr_ah; uint16_t maxpwr_bg; /* BG-PHY Max Power */ + uint8_t rxpo2g; + uint8_t rxpo5g; uint8_t tssi_a; /* Idle TSSI */ uint8_t tssi_bg; /* Idle TSSI */ + uint8_t tri2g; + uint8_t tri5gl; + uint8_t tri5g; + uint8_t tri5gh; + uint8_t rssisav2g; + uint8_t rssismc2g; + uint8_t rssismf2g; + uint8_t bxa2g; + uint8_t rssisav5g; + uint8_t rssismc5g; + uint8_t rssismf5g; + uint8_t bxa5g; + uint16_t cck2gpo; + uint32_t ofdm2gpo; + uint32_t ofdm5glpo; + uint32_t ofdm5gpo; + uint32_t ofdm5ghpo; uint16_t bf_lo; /* boardflags */ uint16_t bf_hi; /* boardflags */ + uint16_t bf2_lo; + uint16_t bf2_hi; + struct { struct { int8_t a0, a1, a2, a3; @@ -234,6 +264,11 @@ struct siba_sprom { } again; /* antenna gain */ }; +#define SIBA_LDO_PAREF 0 +#define SIBA_LDO_VOLT1 1 +#define SIBA_LDO_VOLT2 2 +#define SIBA_LDO_VOLT3 3 + struct siba_cc_pmu { uint8_t rev; /* PMU rev */ uint32_t freq; /* crystal freq in kHz */ @@ -367,5 +402,7 @@ void siba_write_multi_2(struct siba_dev void siba_write_multi_4(struct siba_dev_softc *, const void *, size_t, uint16_t); void siba_barrier(struct siba_dev_softc *, int); +void siba_cc_pmu_set_ldovolt(struct siba_cc *, int, uint32_t); +void siba_cc_pmu_set_ldoparef(struct siba_cc *, uint8_t); #endif /* _SIBA_SIBAVAR_H_ */
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