Date: Thu, 26 Oct 2006 14:17:43 GMT From: Kevin Lo <kevlo@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 108482 for review Message-ID: <200610261417.k9QEHhvj097490@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=108482 Change 108482 by kevlo@kevlo_rtsl on 2006/10/26 14:17:25 o Let it compiles. o ixp425_pci.c: Make ixp425_pci_conf_reg_write static. Affected files ... .. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#11 edit .. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425reg.h#2 edit .. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425var.h#6 edit Differences ... ==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#11 (text+ko) ==== @@ -93,7 +93,7 @@ return (0); } -void +static void ixp425_pci_conf_reg_write(struct ixppcib_softc *sc, uint32_t reg, uint32_t data) { ==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425reg.h#2 (text+ko) ==== @@ -495,4 +495,35 @@ #define PMNC_EVCNT2_SHIFT 16 #define PMNC_EVCNT3_SHIFT 24 +/* + * Queue Manager + */ +#define IXP425_QMGR_HWBASE 0x60000000UL +#define IXP425_QMGR_VBASE (IXP425_PCI_VBASE + IXP425_PCI_SIZE) +/* NB: really only 0x4000 */ +#define IXP425_QMGR_SIZE IXP425_IO_SIZE + +/* + * Network Processing Engines (NPE's) and associated Ethernet MAC's. + */ +#define IXP425_NPE_A_HWBASE (IXP425_IO_HWBASE + IXP425_NPE_A_OFFSET) +#define IXP425_NPE_A_VBASE (IXP425_IO_VBASE + IXP425_NPE_A_OFFSET) +#define IXP425_NPE_A_SIZE 0x1000 /* Actually only 256 bytes */ + +#define IXP425_NPE_B_HWBASE (IXP425_IO_HWBASE + IXP425_NPE_B_OFFSET) +#define IXP425_NPE_B_VBASE (IXP425_IO_VBASE + IXP425_NPE_B_OFFSET) +#define IXP425_NPE_B_SIZE 0x1000 /* Actually only 256 bytes */ + +#define IXP425_NPE_C_HWBASE (IXP425_IO_HWBASE + IXP425_NPE_C_OFFSET) +#define IXP425_NPE_C_VBASE (IXP425_IO_VBASE + IXP425_NPE_C_OFFSET) +#define IXP425_NPE_C_SIZE 0x1000 /* Actually only 256 bytes */ + +#define IXP425_MAC_A_HWBASE (IXP425_IO_HWBASE + IXP425_MAC_A_OFFSET) +#define IXP425_MAC_A_VBASE (IXP425_IO_VBASE + IXP425_MAC_A_OFFSET) +#define IXP425_MAC_A_SIZE 0x1000 /* Actually only 256 bytes */ + +#define IXP425_MAC_B_HWBASE (IXP425_IO_HWBASE + IXP425_MAC_B_OFFSET) +#define IXP425_MAC_B_VBASE (IXP425_IO_VBASE + IXP425_MAC_B_OFFSET) +#define IXP425_MAC_B_SIZE 0x1000 /* Actually only 256 bytes */ + #endif /* _IXP425REG_H_ */ ==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425var.h#6 (text+ko) ==== @@ -47,17 +47,11 @@ #include <dev/pci/pcivar.h> #include <sys/rman.h> -#define GPIO_CONF_WRITE_4(sc, reg, data) \ - bus_space_write_4(sc->sc_iot, sc->sc_gpio_ioh, \ - reg, data) - -#define GPIO_CONF_READ_4(sc, reg) \ - bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg) - struct ixp425_softc { device_t sc_dev; bus_space_tag_t sc_iot; bus_space_handle_t sc_gpio_ioh; + bus_space_handle_t sc_exp_ioh; u_int32_t sc_intrmask; @@ -81,6 +75,16 @@ struct bus_space sc_pci_iot; }; +#define EXP_BUS_WRITE_4(sc, reg, data) \ + bus_space_write_4(sc->sc_iot, sc->sc_exp_ioh, reg, data) +#define EXP_BUS_READ_4(sc, reg) \ + bus_space_read_4(sc->sc_iot, sc->sc_exp_ioh, reg) + +#define GPIO_CONF_WRITE_4(sc, reg, data) \ + bus_space_write_4(sc->sc_iot, sc->sc_gpio_ioh, reg, data) +#define GPIO_CONF_READ_4(sc, reg) \ + bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg) + extern struct bus_space ixpsip_bs_tag; extern struct bus_space ixp425_bs_tag; extern struct bus_space ixp425_a4x_bs_tag; @@ -92,9 +96,6 @@ void ixp425_io_bs_init(bus_space_tag_t, void *); void ixp425_mem_bs_init(bus_space_tag_t, void *); -void ixp425_pci_conf_reg_write(struct ixp425_softc *, uint32_t, uint32_t); -uint32_t ixp425_pci_conf_reg_read(struct ixp425_softc *, uint32_t); - void ixp425_clk_bootstrap(bus_space_tag_t); void ixp425_intr_init(void); void *ixp425_intr_establish(int, int, int (*)(void *), void *);
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