Date: Thu, 2 Aug 2007 06:50:06 GMT From: Martin Nilsson <martin@gneto.com> To: freebsd-bugs@FreeBSD.org Subject: Re: misc/115133: [mpt][mfi] Patches to make mfi support LSI SAS1078 chip Message-ID: <200708020650.l726o6wO002074@freefall.freebsd.org>
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The following reply was made to PR misc/115133; it has been noted by GNATS.
From: Martin Nilsson <martin@gneto.com>
To: bug-followup@FreeBSD.org
Cc:
Subject: Re: misc/115133: [mpt][mfi] Patches to make mfi support LSI SAS1078
chip
Date: Thu, 02 Aug 2007 08:22:00 +0200
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And here is the mfi patch...
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filename="mfi.diff"
Only in mfi: CmdTool.log
diff -u mfi.orig/mfi.c mfi/mfi.c
--- mfi.orig/mfi.c 2007-06-04 18:39:22.000000000 +0200
+++ mfi/mfi.c 2007-08-01 22:10:51.000000000 +0200
@@ -120,7 +120,11 @@
int32_t fw_state, cur_state;
int max_wait, i;
- fw_state = MFI_READ4(sc, MFI_OMSG0) & MFI_FWSTATE_MASK;
+ if(sc->mfi_flags & MFI_FLAGS_PPC) {
+ fw_state = MFI_READ4(sc, MFI_OSP) & MFI_FWSTATE_MASK;
+ } else {
+ fw_state = MFI_READ4(sc, MFI_OMSG0) & MFI_FWSTATE_MASK;
+ }
while (fw_state != MFI_FWSTATE_READY) {
if (bootverbose)
device_printf(sc->mfi_dev, "Waiting for firmware to "
@@ -153,7 +157,11 @@
return (ENXIO);
}
for (i = 0; i < (max_wait * 10); i++) {
- fw_state = MFI_READ4(sc, MFI_OMSG0) & MFI_FWSTATE_MASK;
+ if(sc->mfi_flags & MFI_FLAGS_PPC) {
+ fw_state = MFI_READ4(sc, MFI_OSP) & MFI_FWSTATE_MASK;
+ } else {
+ fw_state = MFI_READ4(sc, MFI_OMSG0) & MFI_FWSTATE_MASK;
+ }
if (fw_state == cur_state)
DELAY(100000);
else
@@ -208,7 +216,11 @@
* It would be nice if these constants were available at runtime
* instead of compile time.
*/
- status = MFI_READ4(sc, MFI_OMSG0);
+ if(sc->mfi_flags & MFI_FLAGS_PPC) {
+ status = MFI_READ4(sc, MFI_OSP);
+ } else {
+ status = MFI_READ4(sc, MFI_OMSG0);
+ }
sc->mfi_max_fw_cmds = status & MFI_FWSTATE_MAXCMD_MASK;
max_fw_sge = (status & MFI_FWSTATE_MAXSGL_MASK) >> 16;
sc->mfi_max_sge = min(max_fw_sge, ((MAXPHYS / PAGE_SIZE) + 1));
@@ -781,10 +793,16 @@
sc = (struct mfi_softc *)arg;
status = MFI_READ4(sc, MFI_OSTS);
- if ((status & MFI_OSTS_INTR_VALID) == 0)
- return;
+ if(sc->mfi_flags & MFI_FLAGS_PPC) {
+ if ((status & MFI_OSTS_INTR_VALID_1078) == 0)
+ return;
+ MFI_WRITE4(sc, MFI_ODBC, status);
+ } else {
+ if ((status & MFI_OSTS_INTR_VALID) == 0)
+ return;
+ MFI_WRITE4(sc, MFI_OSTS, status);
+ }
- MFI_WRITE4(sc, MFI_OSTS, status);
pi = sc->mfi_comms->hw_pi;
ci = sc->mfi_comms->hw_ci;
@@ -848,7 +866,11 @@
mfi_enable_intr(struct mfi_softc *sc)
{
- MFI_WRITE4(sc, MFI_OMSK, 0x01);
+ if(sc->mfi_flags & MFI_FLAGS_PPC) {
+ MFI_WRITE4(sc, MFI_ODBC, 0xffffffff);
+ MFI_WRITE4(sc, MFI_OMSK, ~0x80000004);
+ } else
+ MFI_WRITE4(sc, MFI_OMSK, 0x01);
}
static void
@@ -1635,8 +1657,13 @@
if (cm->cm_extra_frames > 7)
cm->cm_extra_frames = 7;
- MFI_WRITE4(sc, MFI_IQP, (cm->cm_frame_busaddr >> 3) |
- cm->cm_extra_frames);
+ if(sc->mfi_flags & MFI_FLAGS_PPC) {
+ MFI_WRITE4(sc, MFI_IQP, cm->cm_frame_busaddr |
+ (cm->cm_extra_frames<<1)|1);
+ } else {
+ MFI_WRITE4(sc, MFI_IQP, (cm->cm_frame_busaddr >> 3) |
+ cm->cm_extra_frames);
+ }
if ((cm->cm_flags & MFI_CMD_POLLED) == 0)
return (0);
diff -u mfi.orig/mfi_pci.c mfi/mfi_pci.c
--- mfi.orig/mfi_pci.c 2007-05-10 17:33:41.000000000 +0200
+++ mfi/mfi_pci.c 2007-08-01 22:10:51.000000000 +0200
@@ -91,6 +91,7 @@
{0x1000, 0x0411, 0xffff, 0xffff, 0, "LSI MegaSAS 1064R"}, /* Brocton IOP */
{0x1000, 0x0413, 0xffff, 0xffff, 0, "LSI MegaSAS 1064R"}, /* Verde ZCR */
{0x1028, 0x0015, 0xffff, 0xffff, 0, "Dell PERC 5/i"},
+ {0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_PPC, "LSI MegaSAS 1078R"}, /* ppc IOP */
{0, 0, 0, 0, 0, NULL}
};
diff -u mfi.orig/mfireg.h mfi/mfireg.h
--- mfi.orig/mfireg.h 2007-05-16 19:23:36.000000000 +0200
+++ mfi/mfireg.h 2007-08-01 22:10:51.000000000 +0200
@@ -55,10 +55,14 @@
#define MFI_OMSK 0x34 /* Outbound interrupt mask */
#define MFI_IQP 0x40 /* Inbound queue port */
#define MFI_OQP 0x44 /* Outbound queue port */
+#define MFI_ODBC 0xa0 /* Outbound doorbell clear */
+#define MFI_OSP 0xb0 /* Outbound scratch pad */
+#define MFI_ILQP 0xc0 /* inbound low queue port */
+#define MFI_IHQP 0xc4 /* inbound high queue port */
/* Bits for MFI_OSTS */
-#define MFI_OSTS_INTR_VALID 0x00000002
-
+#define MFI_OSTS_INTR_VALID 0x00000002
+#define MFI_OSTS_INTR_VALID_1078 0x80000000
/*
* Firmware state values. Found in OMSG0 during initialization.
*/
diff -u mfi.orig/mfivar.h mfi/mfivar.h
--- mfi.orig/mfivar.h 2007-06-04 18:39:22.000000000 +0200
+++ mfi/mfivar.h 2007-08-01 22:10:51.000000000 +0200
@@ -101,6 +101,7 @@
#define MFI_FLAGS_QFRZN (1<<1)
#define MFI_FLAGS_OPEN (1<<2)
#define MFI_FLAGS_STOP (1<<3)
+#define MFI_FLAGS_PPC (1<<4)
struct mfi_hwcomms *mfi_comms;
TAILQ_HEAD(,mfi_command) mfi_free;
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