Date: Tue, 06 Nov 2007 01:13:27 -0800 From: Xin LI <delphij@delphij.net> To: "Andrey V. Elsukov" <bu7cher@yandex.ru> Cc: "Aryeh M. Friedman" <aryeh.friedman@gmail.com>, freebsd-current@freebsd.org, d@delphij.net, Justin Hibbits <jrh29@alumni.cwru.edu> Subject: Re: [ANNOUNCEMENT] Wiki for discussing P35/IHC9(R)/SATA issues set up Message-ID: <47303037.6040305@delphij.net> In-Reply-To: <473001E7.2090201@yandex.ru> References: <472D56A1.7070206@gmail.com> <200711041119.45971.jrh29@alumni.cwru.edu> <472DD231.9030501@gmail.com> <472E67CC.9040201@delphij.net> <472E4FF0.3080801@gmail.com> <472EB211.7050001@delphij.net> <472EEADF.1000008@gmail.com> <472F466E.8050405@delphij.net> <472F5846.1020304@gmail.com> <472F5D9A.9050900@delphij.net> <472FCC15.9040903@gmail.com> <472FD0FB.9090608@delphij.net> <473001E7.2090201@yandex.ru>
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-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Andrey V. Elsukov wrote: > Xin LI wrote: >> Thanks for the information, I'd appreciate if you would help me to test >> the attached patch against RELENG_7 (should apply to HEAD as well). > > Hi, Xin. > > This patch is not correct for me. I think we need implement a > full support for several new Marvell chips: > #define ATA_M88SE6101 0x610111ab /* ThorLite 1P */ > #define ATA_M88SE6111 0x611111ab /* ThorLite 1S/1P */ > #define ATA_M88SE6121 0x612111ab /* ThorLite 2S/1P */ > #define ATA_M88SE6122 0x612211ab /* ThorLite 2S/1P w/ flash */ > #define ATA_M88SE6141 0x614111ab /* Thor 4S/1P */ > #define ATA_M88SE6145 0x614511ab /* Thor 4S/1P */ Yes, you are correct, we need some AHCI stuff. > There is a linux driver from ASUS: > ftp://dlsvr01.asus.com/pub/ASUS/mb/socket775/P5E_WS_Professional/LinuxDrivers.zip Googl'ing did not revealed me some useful material like datasheets for this, so what we can do is probably to "guess" the meaning of the Linux driver (I have got one but that appears to be generated by some script containing a lot of redundant code and mostly "XXX not yet" comments :-/) The download from the site you mentioned is quite slow here. It's 1:00AM here so I have to go to sleep, and have the download continue. > These controllers have one PATA port and may have several SATA ports. > As i understand from the sources controller is mostly AHCI-like. It > use AHCI registers, but not fully AHCI. Also driver need some hacks > if we want to have both SATA and PATA support, because current our > ata driver uses methods from the parent atapci driver for each > channel, but we need different methods for SATA and PATA. > > I think the right way - try to fix ICH9 part of this problem and wait > until we will have a full support for the Marvell chips. Yes. Unfortunately one of the patch that attempts to address the speed mismatch was wrong due to a misread of the spec, so please don't bother to try that patcheset. BTW I have reproduced some READ_BIG issues but that's unrelated chipset, which could be some hardware problem because it is old. Do you have some more issues with ICH9 except those are mentioned in this thread? It seems that you have mentioned kern/113195 and kern/116125, according to my first glance these patches it seems that the second one contains all necessary bits in the first one (maybe some slight difference due to different KPI, though), and the risk seems to be controllable (does not seem to break previously supported chipset). I guess it might be ok to have it committed with some proper review, I will try to ping sos@ tomorrow morning after some careful inspect to it. Cheers, - -- Xin LI <delphij@delphij.net> http://www.delphij.net/ FreeBSD - The Power to Serve! -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.7 (FreeBSD) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFHMDA2hcUczkLqiksRAuMQAJ9agNvjNAm4VztrKtdbM+rEPSYraQCdE2VC UOlzR0SAZ8Nl/sUZ/h6pN0g= =cx1Z -----END PGP SIGNATURE-----
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