Date: Wed, 5 Jan 2011 11:46:17 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r216993 - stable/8/sys/dev/mii Message-ID: <201101051146.p05BkHYs076718@svn.freebsd.org>
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Author: marius Date: Wed Jan 5 11:46:17 2011 New Revision: 216993 URL: http://svn.freebsd.org/changeset/base/216993 Log: MFC: r216623 - Add a comment regarding the fact that as documented in the datasheet manual 1000BASE-T modes of DP83865 only work together with other National Semiconductor PHYs. - Spell 10BASE-T correctly - Remove some redundant braces. Modified: stable/8/sys/dev/mii/nsgphy.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/sys/dev/mii/nsgphy.c ============================================================================== --- stable/8/sys/dev/mii/nsgphy.c Wed Jan 5 11:43:17 2011 (r216992) +++ stable/8/sys/dev/mii/nsgphy.c Wed Jan 5 11:46:17 2011 (r216993) @@ -140,11 +140,15 @@ nsgphy_attach(device_t dev) mii_phy_reset(sc); /* - * NB: the PHY has the 10baseT BMSR bits hard-wired to 0, - * even though it supports 10baseT. + * NB: the PHY has the 10BASE-T BMSR bits hard-wired to 0, + * even though it supports 10BASE-T. */ sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) | - (BMSR_10TFDX | BMSR_10THDX)) & ma->mii_capmask; + BMSR_10TFDX | BMSR_10THDX) & ma->mii_capmask; + /* + * Note that as documented manual 1000BASE-T modes of DP83865 only + * work together with other National Semiconductor PHYs. + */ if (sc->mii_capabilities & BMSR_EXTSTAT) sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
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