Date: Sat, 12 Apr 1997 11:45:20 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: thorpej@nas.nasa.gov Cc: langfod@dihelix.com, ejs@bfd.com, hasty@rah.star-gate.com, steve@visint.co.uk, louie@transsys.com, michaelh@cet.co.jp, avalon@coombs.anu.edu.au, terry@lambert.org, hackers@freebsd.org Subject: Re: 430TX ? Message-ID: <199704121845.LAA15464@phaeton.artisoft.com> In-Reply-To: <199704120130.SAA21709@lestat.nas.nasa.gov> from "Jason Thorpe" at Apr 11, 97 06:29:56 pm
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> > Right. If you look at the Mips, Alpha, PowerPC, Sparc, etc.. They all > > have 1-2Meg caches on the higher end systems. > > ...1-2M is a small cache, IMO. We have an Alpha with a 4M cache, and are > getting some with 16M cache.. The real pain is that no one seems to be doing anything about getting SRAM density up... the only benefit DRAM has over SRAM is its density... everything else favors SRAM. Regards, Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
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