Date: Fri, 15 May 2009 07:45:14 GMT From: Hans Petter Selasky <hselasky@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 162107 for review Message-ID: <200905150745.n4F7jEPh061857@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=162107 Change 162107 by hselasky@hselasky_laptop001 on 2009/05/15 07:45:03 USB controller: - add more AVR32 DCI register definitions. Affected files ... .. //depot/projects/usb/src/sys/dev/usb/controller/avr32dci.h#3 edit Differences ... ==== //depot/projects/usb/src/sys/dev/usb/controller/avr32dci.h#3 (text+ko) ==== @@ -32,33 +32,105 @@ /* Register definitions */ #define AVR32_CTRL 0x00 /* Control */ +#define AVR32_CTRL_DEV_ADDR 0x7F +#define AVR32_CTRL_DEV_FADDR_EN 0x80 +#define AVR32_CTRL_DEV_EN_USBA 0x100 +#define AVR32_CTRL_DEV_DETACH 0x200 +#define AVR32_CTRL_DEV_REWAKEUP 0x400 + #define AVR32_FNUM 0x04 /* Frame Number */ +#define AVR32_FNUM_MASK 0x3FFF + /* 0x08 - 0x0C Reserved */ #define AVR32_IEN 0x10 /* Interrupt Enable */ #define AVR32_INTSTA 0x14 /* Interrupt Status */ #define AVR32_CLRINT 0x18 /* Clear Interrupt */ + +#define AVR32_INT_SPEED 0x00000002 /* set if High Speed else Full Speed */ +#define AVR32_INT_DET_SUSPD 0x00000002 +#define AVR32_INT_MICRO_SOF 0x00000004 +#define AVR32_INT_INT_SOF 0x00000008 +#define AVR32_INT_ENDRESET 0x00000010 +#define AVR32_INT_WAKE_UP 0x00000020 +#define AVR32_INT_ENDOFRSM 0x00000040 +#define AVR32_INT_UPSTR_RES 0x00000080 +#define AVR32_INT_EPT_INT(n) (0x00000100 << (n)) +#define AVR32_INT_DMA_INT(n) (0x01000000 << (n)) + #define AVR32_EPTRST 0x1C /* Endpoints Reset */ +#define AVR32_EPTRST_MASK(n) (0x00000001 << (n)) + /* 0x20 - 0xCC Reserved */ #define AVR32_TSTSOFCNT 0xD0 /* Test SOF Counter */ #define AVR32_TSTCNTA 0xD4 /* Test A Counter */ #define AVR32_TSTCNTB 0xD8 /* Test B Counter */ #define AVR32_TSTMODEREG 0xDC /* Test Mode */ #define AVR32_TST 0xE0 /* Test */ +#define AVR32_TST_NORMAL 0x00000000 +#define AVR32_TST_HS_ONLY 0x00000002 +#define AVR32_TST_FS_ONLY 0x00000003 + /* 0xE4 - 0xE8 Reserved */ #define AVR32_IPPADDRSIZE 0xEC /* PADDRSIZE */ #define AVR32_IPNAME1 0xF0 /* Name1 */ #define AVR32_IPNAME2 0xF4 /* Name2 */ #define AVR32_IPFEATURES 0xF8 /* Features */ +#define AVR32_IPFEATURES_NEP(x) (((x) & 0xF) ? ((x) & 0xF) : 0x10) + #define AVR32_IPVERSION 0xFC /* IP Version */ + #define _A(base,n) ((base) + (0x20*(n))) #define AVR32_EPTCFG(n) _A(0x100, n) /* Endpoint Configuration */ +#define AVR32_EPTCFG_EPSIZE(n) ((n)-3) /* power of two */ +#define AVR32_EPTCFG_EPDIR_OUT 0x00000000 +#define AVR32_EPTCFG_EPDIR_IN 0x00000008 +#define AVR32_EPTCFG_TYPE_CTRL 0x00000000 +#define AVR32_EPTCFG_TYPE_ISOC 0x00000100 +#define AVR32_EPTCFG_TYPE_BULK 0x00000200 +#define AVR32_EPTCFG_TYPE_INTR 0x00000300 +#define AVR32_EPTCFG_NBANK(n) (0x00000400*(n)) +#define AVR32_EPTCFG_NB_TRANS(n) (0x00001000*(n)) +#define AVR32_EPTCFG_EPT_MAPD 0x80000000 + #define AVR32_EPTCTLENB(n) _A(0x104, n) /* Endpoint Control Enable */ #define AVR32_EPTCTLDIS(n) _A(0x108, n) /* Endpoint Control Disable */ #define AVR32_EPTCTL(n) _A(0x10C, n) /* Endpoint Control */ +#define AVR32_EPTCTL_EPT_ENABL 0x00000001 +#define AVR32_EPTCTL_AUTO_VALID 0x00000002 +#define AVR32_EPTCTL_INTDIS_DMA 0x00000008 +#define AVR32_EPTCTL_NYET_DIS 0x00000010 +#define AVR32_EPTCTL_DATAX_RX 0x00000040 +#define AVR32_EPTCTL_MDATA_RX 0x00000080 +#define AVR32_EPTCTL_ERR_OVFLW 0x00000100 +#define AVR32_EPTCTL_RX_BK_RDY 0x00000200 +#define AVR32_EPTCTL_TX_COMPLT 0x00000400 +#define AVR32_EPTCTL_TX_PK_RDY 0x00000800 +#define AVR32_EPTCTL_RX_SETUP 0x00001000 +#define AVR32_EPTCTL_STALL_SNT 0x00002000 +#define AVR32_EPTCTL_NAK_IN 0x00004000 +#define AVR32_EPTCTL_NAK_OUT 0x00008000 +#define AVR32_EPTCTL_BUSY_BANK 0x00040000 +#define AVR32_EPTCTL_SHORT_PCKT 0x80000000 + /* 0x110 Reserved */ #define AVR32_EPTSETSTA(n) _A(0x114, n) /* Endpoint Set Status */ #define AVR32_EPTCLRSTA(n) _A(0x118, n) /* Endpoint Clear Status */ #define AVR32_EPTSTA(n) _A(0x11C, n) /* Endpoint Status */ +#define AVR32_EPTSTA_FRCESTALL 0x00000020 +#define AVR32_EPTSTA_TOGGLESQ_STA(x) (((x) & 0xC0) >> 6) +#define AVR32_EPTSTA_ERR_OVFLW 0x00000000 +#define AVR32_EPTSTA_RX_BK_RDY 0x00000000 +#define AVR32_EPTSTA_TX_COMPLT 0x00000000 +#define AVR32_EPTSTA_TX_PK_RDY 0x00000000 +#define AVR32_EPTSTA_RX_SETUP 0x00000000 +#define AVR32_EPTSTA_STALL_SNT 0x00000000 +#define AVR32_EPTSTA_NAK_IN 0x00000000 +#define AVR32_EPTSTA_NAK_OUT 0x00000000 +#define AVR32_EPTSTA_CURRENT_BANK(x) (((x) & 0x00030000) >> 16) +#define AVR32_EPTSTA_BUSY_BANK_STA(x) (((x) & 0x000C0000) >> 18) +#define AVR32_EPTSTA_BYTE_COUNT(x) (((x) & 0x7FF00000) >> 20) +#define AVR32_EPTSTA_SHRT_PCKT 0x80000000 + /* 0x300 - 0x30C Reserved */ #define AVR32_DMANXTDSC 0x310 /* DMA Next Descriptor Address */ #define AVR32_DMAADDRESS 0x314 /* DMA Channel Address */
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200905150745.n4F7jEPh061857>