Date: Wed, 12 Apr 2006 21:23:52 +0200 From: Alexander Leidinger <Alexander@Leidinger.net> To: Scott Long <scottl@samsco.org> Cc: Sobolev <sobomax@FreeBSD.org>, src-committers@FreeBSD.org, Harti Brandt <harti@FreeBSD.org>, John Baldwin <jhb@FreeBSD.org>, cvs-src@FreeBSD.org, Maxim, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/boot/i386/cdboot cdboot.s Message-ID: <20060412212352.4b314d5d@Magellan.Leidinger.net> In-Reply-To: <443D1F5F.5000404@samsco.org> References: <200604110439.k3B4dTOD072774@repoman.freebsd.org> <200604111803.27889.jhb@freebsd.org> <443C76A0.30308@FreeBSD.org> <200604121032.07279.jhb@freebsd.org> <20060412170003.wfyjml16h44kcg0w@netchild.homeip.net> <20060412171426.F848@beagle.kn.op.dlr.de> <20060412173004.bpcfa319icco88so@netchild.homeip.net> <443D1F5F.5000404@samsco.org>
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Am Wed, 12 Apr 2006 09:40:15 -0600 schrieb Scott Long <scottl@samsco.org>: > Alexander Leidinger wrote: > > Harti Brandt <hartmut.brandt@dlr.de> wrote: > > > >> There is very good article in the last C't (www.heise.de/ct, but the > >> article is only in the printed version) which explains all the different > > > > > > Yes! Now I remember where I've read about it... > > Anyone care to provide a translation? 3 full pages... I think a summary would be better than a translation: Pentium D and Athlon 64 X2 mimic itself as CPU's with 2 threads (P4 Extreme = 4 threads). Old definition for the HTT bit in the feature register: "HTT: Hyper-Threading Technologiy." The processor supports Hyper-Threading Technology. New (rev 15 of "Intel Soft. Developer Manual Vol 2a, Jan 06, 25366618.pdf)): "HTT: Multi-Threading." The physical processor package is capable of supporting more than one logical processor. For AMD X2: If bit 1 in CPUID (0x80000001).ECX is set, it means (= CMP_LEGACY: Core MultiProcessor LEGACY) that the CPU is "lying" regarding the old meaning of HTT (= there may be some real cores instead of only HT). CPUID(0x80000008).ECX[7..0] gives the number of real cores. For Intel: Number of cores is in CPUID(4).EAX[31..26] (you need to call it with ecx=0). The information is inconsistent between the CPUID doc (Jan 06, 28161830.pdf, "= number of cores on this Die") and the Software Development Manual (Jan 06, 25366818.pdf, "= max number of cores in this physical package") The article also talks about the inital APIC-ID in CPUID(1).EBX[31..24] (extended to 8 bit with the xAPIC extension of the P4/xeon, and now changed again (variable sizing of the fields!) for the multi-core CPU's). They also have a graph for the detection logic (multi or single core, with or without HTT) and some tables (e.g. assignment between local APIC-ID and initial APIC-ID). Here's link to some software and some C++ code they provide: http://www.heise.de/ct/06/08/links/206.shtml If someone needs more infos regarding a specific topic, just ask. Bye, Alexander. -- The three Rs of Microsoft support: Retry, Reboot, Reinstall. http://www.Leidinger.net Alexander @ Leidinger.net GPG fingerprint = C518 BC70 E67F 143F BE91 3365 79E2 9C60 B006 3FE7 WL http://www.amazon.de/exec/obidos/registry/1FZ4DTHQE9PQ8/ref=wl_em_to/
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