Date: Sat, 25 Feb 2012 15:21:43 +0000 (UTC) From: Glen Barber <gjb@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r232158 - in head: bin/expr lib/libc/sys lib/libpmc sbin/iscontrol share/man/man4 share/man/man5 sys/boot/forth Message-ID: <201202251521.q1PFLh9N022959@svn.freebsd.org>
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Author: gjb (doc committer) Date: Sat Feb 25 15:21:43 2012 New Revision: 232158 URL: http://svn.freebsd.org/changeset/base/232158 Log: Whitespace cleanup: o Wrap sentences on to new lines o Cleanup trailing whitespace Found with: textproc/igor MFC after: 1 week X-MFC-With: r232157 Modified: head/bin/expr/expr.1 head/lib/libc/sys/pdfork.2 head/lib/libpmc/pmc.mips.3 head/sbin/iscontrol/iscsi.conf.5 head/share/man/man4/cxgbe.4 head/share/man/man4/ed.4 head/share/man/man4/umcs.4 head/share/man/man5/rc.conf.5 head/sys/boot/forth/menu.4th.8 Modified: head/bin/expr/expr.1 ============================================================================== --- head/bin/expr/expr.1 Sat Feb 25 14:31:25 2012 (r232157) +++ head/bin/expr/expr.1 Sat Feb 25 15:21:43 2012 (r232158) @@ -176,7 +176,8 @@ option, since this matches the historic .Nm in .Fx . This option makes number parsing less strict and permits leading -white space and an optional leading plus sign. In addition, empty operands +white space and an optional leading plus sign. +In addition, empty operands have an implied value of zero in numeric context. For historical reasons, defining the environment variable .Ev EXPR_COMPAT @@ -300,7 +301,8 @@ standard, the use of string arguments .Va index , or .Va match -produces undefined results. In this version of +produces undefined results. +In this version of .Nm , these arguments are treated just as their respective string values. .Pp Modified: head/lib/libc/sys/pdfork.2 ============================================================================== --- head/lib/libc/sys/pdfork.2 Sat Feb 25 14:31:25 2012 (r232157) +++ head/lib/libc/sys/pdfork.2 Sat Feb 25 15:21:43 2012 (r232158) @@ -101,7 +101,8 @@ queries status of a process descriptor; .Fa st_ctime and .Fa st_mtime -fields are defined. If the owner read, write, and execute bits are set then the +fields are defined. +If the owner read, write, and execute bits are set then the process represented by the process descriptor is still alive. .Pp .Xr poll 2 Modified: head/lib/libpmc/pmc.mips.3 ============================================================================== --- head/lib/libpmc/pmc.mips.3 Sat Feb 25 14:31:25 2012 (r232157) +++ head/lib/libpmc/pmc.mips.3 Sat Feb 25 15:21:43 2012 (r232158) @@ -54,16 +54,16 @@ MIPS programmable PMCs support the follo .Bl -tag -width indent .It Li CYCLE .Pq Event 0, Counter 0/1 -Total number of cycles. +Total number of cycles. The performance counters are clocked by the -top-level gated clock. +top-level gated clock. If the core is built with that clock gater present, none of the counters will increment while the clock is stopped - due to a WAIT instruction. .It Li INSTR_EXECUTED .Pq Event 1, Counter 0/1 Total number of instructions completed. -.It Li BRANCH_COMPLETED +.It Li BRANCH_COMPLETED .Pq Event 2, Counter 0 Total number of branch instructions completed. .It Li BRANCH_MISPRED @@ -85,9 +85,9 @@ If RPS use is disabled, JR $31 will not .Pq Event 5, Counter 0 Counts ITLB accesses that are due to fetches showing up in the instruction fetch stage of the pipeline and which do not use a fixed -mapping or are not in unmapped space. +mapping or are not in unmapped space. If an address is fetched twice from the pipe (as in the case of a -cache miss), that instruction willcount as 2 ITLB accesses. +cache miss), that instruction willcount as 2 ITLB accesses. Since each fetch gets us 2 instructions,there is one access marked per double word. .It Li ITLB_MISS @@ -102,7 +102,8 @@ They are also ignored if there is some f Counts DTLB access including those in unmapped address spaces. .It Li DTLB_MISS .Pq Event 6, Counter 1 -Counts DTLB misses. Back to back misses that result in only one DTLB +Counts DTLB misses. +Back to back misses that result in only one DTLB entry getting refilled are counted as a single miss. .It Li JTLB_IACCESS .Pq Event 7, Counter 0 @@ -119,7 +120,8 @@ Data JTLB accesses. Counts data JTLB accesses that result in no match or a match on an invalid translation. .It Li IC_FETCH .Pq Event 9, Counter 0 -Counts every time the instruction cache is accessed. All replays, +Counts every time the instruction cache is accessed. +All replays, wasted fetches etc. are counted. For example, following a branch, even though the prediction is taken, the fall through access is counted. @@ -179,7 +181,8 @@ when both stalls are active will only be replay traps (other than uTLB) .It Li STORE_COND_COMPLETED .Pq Event 19, Counter 0 -Conditional stores completed. Counts all events, including failed stores. +Conditional stores completed. +Counts all events, including failed stores. .It Li STORE_COND_FAILED .Pq Event 19, Counter 1 Conditional store instruction that did not update memory. @@ -189,7 +192,7 @@ different and the observed operating mod causing some inaccuracy in the measured ratio. .It Li ICACHE_REQUESTS .Pq Event 20, Counter 0 -Note that this only counts PREFs that are actually attempted. +Note that this only counts PREFs that are actually attempted. PREFs to uncached addresses or ones with translation errors are not counted .It Li ICACHE_HIT .Pq Event 20, Counter 1 @@ -214,7 +217,7 @@ Any type of exception taken. Counts cycles where the LSU is in fixup and cannot accept a new instruction from the ALU. Fixups are replays within the LSU that occur when an instruction needs -to re-access the cache or the DTLB. +to re-access the cache or the DTLB. .It Li IFU_CYCLES_STALLED .Pq Event 25, Counter 0 Counts the number of cycles where the fetch unit is not providing a @@ -256,7 +259,7 @@ Cycles where the main pipeline is stalle in the Fill Store Buffer. .It Li DMISS_CYCLES .Pq Event 39, Counter 0 -Data miss is outstanding, but not necessarily stalling the pipeline. +Data miss is outstanding, but not necessarily stalling the pipeline. The difference between this and D$ miss stall cycles can show the gain from non-blocking cache misses. .It Li L2_MISS_CYCLES @@ -282,7 +285,8 @@ Counts all cycles where integer pipeline Count all pipeline bubbles that are a result of multicycle ISPRAM access. Pipeline bubbles are defined as all cycles that IFU doesn't present an -instruction to ALU. The four cycles after a redirect are not counted. +instruction to ALU. +The four cycles after a redirect are not counted. .It Li DSPRAM_STALL_CYCLES .Pq Event 43, Counter 1 Counts stall cycles created by an instruction waiting for access to DSPRAM. @@ -372,10 +376,10 @@ aliases supported by .Lb libpmc and the underlying hardware events used. .Bl -column "branch-mispredicts" "cpu_clk_unhalted.core_p" -.It Em Alias Ta Em Event Ta +.It Em Alias Ta Em Event Ta .It Li instructions Ta Li INSTR_EXECUTED Ta -.It Li branches Ta Li BRANCH_COMPLETED Ta -.It Li branch-mispredicts Ta Li BRANCH_MISPRED Ta +.It Li branches Ta Li BRANCH_COMPLETED Ta +.It Li branch-mispredicts Ta Li BRANCH_MISPRED Ta .El .Sh SEE ALSO .Xr pmc 3 , Modified: head/sbin/iscontrol/iscsi.conf.5 ============================================================================== --- head/sbin/iscontrol/iscsi.conf.5 Sat Feb 25 14:31:25 2012 (r232157) +++ head/sbin/iscontrol/iscsi.conf.5 Sat Feb 25 15:21:43 2012 (r232158) @@ -39,7 +39,7 @@ program. It contains declarations and parameter/key-options. The syntax is very simple, .D1 Li variable = value; -and they can be grouped via a +and they can be grouped via a .Em block declaration: .Bf Li @@ -60,7 +60,7 @@ currently only supported authentication digest either MD5 or SHA. Default is none. .It Cm HeaderDigest -a +a .Em digest is calculated on the header of all iSCSI PDUs, and checked. @@ -141,7 +141,7 @@ to the value specified. .It Cm maxluns overrides the compiled value of .Sy luns , -see +see .Xr iscsi_initiator 4 . This value can only be reduced. .It Cm sockbufsize @@ -185,7 +185,7 @@ myiscsi { # nickname targetaddress = iscsi1 targetname = iqn.1900.com.com:sn.123456 } -chaptest { +chaptest { targetaddress= 10.0.0.1; targetname = iqn.1900.com.com:sn.123456 initiatorname= iqn.2005-01.il.ac.huji.cs:nobody Modified: head/share/man/man4/cxgbe.4 ============================================================================== --- head/share/man/man4/cxgbe.4 Sat Feb 25 14:31:25 2012 (r232157) +++ head/share/man/man4/cxgbe.4 Sat Feb 25 15:21:43 2012 (r232158) @@ -100,28 +100,36 @@ prompt before booting the kernel or stor .Xr loader.conf 5 . .Bl -tag -width indent .It Va hw.cxgbe.ntxq10g -The number of tx queues to use for a 10Gb port. The default is 16 or the number +The number of tx queues to use for a 10Gb port. +The default is 16 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.nrxq10g -The number of rx queues to use for a 10Gb port. The default is 8 or the number +The number of rx queues to use for a 10Gb port. +The default is 8 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.ntxq1g -The number of tx queues to use for a 1Gb port. The default is 4 or the number +The number of tx queues to use for a 1Gb port. +The default is 4 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.nrxq1g -The number of rx queues to use for a 1Gb port. The default is 2 or the number +The number of rx queues to use for a 1Gb port. +The default is 2 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.nofldtxq10g -The number of TOE tx queues to use for a 10Gb port. The default is 8 or the +The number of TOE tx queues to use for a 10Gb port. +The default is 8 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.nofldrxq10g -The number of TOE rx queues to use for a 10Gb port. The default is 2 or the +The number of TOE rx queues to use for a 10Gb port. +The default is 2 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.nofldtxq1g -The number of TOE tx queues to use for a 1Gb port. The default is 2 or the +The number of TOE tx queues to use for a 1Gb port. +The default is 2 or the number of CPU cores in the system, whichever is less. .It Va hw.cxgbe.nofldrxq1g -The number of TOE rx queues to use for a 1Gb port. The default is 1. +The number of TOE rx queues to use for a 1Gb port. +The default is 1. .It Va hw.cxgbe.holdoff_timer_idx_10G .It Va hw.cxgbe.holdoff_timer_idx_1G The timer index value to use to delay interrupts. @@ -149,7 +157,8 @@ ifconfig up). The size, in number of entries, of the descriptor ring used for a tx queue. A buf_ring of the same size is also allocated for additional -software queuing. See +software queuing. +See .Xr ifnet 9 . The default value is 1024. Different cxgbe interfaces can be assigned different values via the Modified: head/share/man/man4/ed.4 ============================================================================== --- head/share/man/man4/ed.4 Sat Feb 25 14:31:25 2012 (r232157) +++ head/share/man/man4/ed.4 Sat Feb 25 15:21:43 2012 (r232158) @@ -423,8 +423,8 @@ packets are received. As a result, it may throw out some good packets which have been received but not yet transferred from the card to main memory. .Pp -The -.Nm +The +.Nm driver is slow by today's standards. .Pp PC Card attachment supports the D-Link DMF650TX LAN/Modem card's Ethernet Modified: head/share/man/man4/umcs.4 ============================================================================== --- head/share/man/man4/umcs.4 Sat Feb 25 14:31:25 2012 (r232157) +++ head/share/man/man4/umcs.4 Sat Feb 25 15:21:43 2012 (r232158) @@ -54,8 +54,10 @@ umcs_load="YES" The .Nm driver provides support for various multiport serial adapters based on the MosCom -MCS7820 and MCS7840 chips. They are 2- or 4-port adapters with full-featured -16550-compatible UARTs and very flexible baud generators. Also, these chips +MCS7820 and MCS7840 chips. +They are 2- or 4-port adapters with full-featured +16550-compatible UARTs and very flexible baud generators. +Also, these chips support RS422/RS485 and IrDA operations. .Pp The device is accessed through the Modified: head/share/man/man5/rc.conf.5 ============================================================================== --- head/share/man/man5/rc.conf.5 Sat Feb 25 14:31:25 2012 (r232157) +++ head/share/man/man5/rc.conf.5 Sat Feb 25 15:21:43 2012 (r232158) @@ -200,7 +200,7 @@ to handle device added, removed or unkno .Pq Vt bool Run .Xr ddb 8 -to install +to install .Xr ddb 4 scripts at boot time. .It Va ddb_config @@ -1273,7 +1273,7 @@ options in this variable, in addition to file. For instance, to configure an .Xr ath 4 -wireless device in station mode with an address obtained +wireless device in station mode with an address obtained via DHCP, using WPA authentication and 802.11b mode, it is possible to use something like: .Bd -literal @@ -1449,7 +1449,8 @@ Aliases should be set by .Va ifconfig_ Ns Ao Ar interface Ac Ns Va _alias Ns Aq Ar n with .Dq Li inet6 -keyword. For example: +keyword. +For example: .Bd -literal ifconfig_ed0_ipv6="inet6 2001:db8:1::1 prefixlen 64" ifconfig_ed0_alias0="inet6 2001:db8:2::1 prefixlen 64" @@ -1552,14 +1553,17 @@ If .Dq Li AUTO is specified, it attempts to read a file .Pa /etc/ip6addrctl.conf -first. If this file is found, +first. +If this file is found, .Xr ip6addrctl 8 -reads and installs it. If not found, a policy is automatically set +reads and installs it. +If not found, a policy is automatically set according to .Va ipv6_activate_all_interfaces variable; if the variable is set to .Dq Li YES -the IPv6-preferred one is used. Otherwise IPv4-preferred. +the IPv6-preferred one is used. +Otherwise IPv4-preferred. .Pp The default value of .Va ip6addrctl_enable Modified: head/sys/boot/forth/menu.4th.8 ============================================================================== --- head/sys/boot/forth/menu.4th.8 Sat Feb 25 14:31:25 2012 (r232157) +++ head/sys/boot/forth/menu.4th.8 Sat Feb 25 15:21:43 2012 (r232158) @@ -86,7 +86,8 @@ If set to .Dq Li YES (case-insensitive) or .Dq Li 1 , -causes the menu to be displayed in color wherever possible. This includes the +causes the menu to be displayed in color wherever possible. +This includes the use of ANSI bold for numbers appearing to the left of menuitems and the use of special .Dq Li ansi @@ -117,14 +118,18 @@ for additional information. .It Va menu_timeout_command The command to be executed after .Va autoboot_delay -seconds if a key is not pressed. The default is +seconds if a key is not pressed. +The default is .Ic boot . .It Va loader_menu_timeout_x -Sets the desired column position of the timeout countdown text. Default is 4. +Sets the desired column position of the timeout countdown text. +Default is 4. .It Va loader_menu_timeout_y -Sets the desired row position of the timeout countdown text. Default is 23. +Sets the desired row position of the timeout countdown text. +Default is 23. .It Va loader_menu_title -The text to display centered above the menu. Default is +The text to display centered above the menu. +Default is .Dq Li "Welcome to FreeBSD" . .It Va menu_caption[x] The text to be displayed for the numbered menuitem @@ -132,7 +137,8 @@ The text to be displayed for the numbere .It Va menu_command[x] The command to be executed when the number associated with menuitem .Dq Li x -is pressed. See the list of included FICL words below for some ideas. +is pressed. +See the list of included FICL words below for some ideas. .It Va menu_keycode[x] An optional decimal ASCII keycode to be associated with menuitem .Dq Li x . @@ -201,7 +207,8 @@ menuitem (if configured). .It Va hint.acpi.0.disabled Effects the display of the .Va menu_acpi -menuitem. If set, the menuitem will display +menuitem. +If set, the menuitem will display .Va toggled_text[x] .Va ( toggled_ansi[x] if @@ -225,7 +232,8 @@ and .It Va menu_reboot If set, adds a built-in .Dq Li Reboot -menuitem to the end of the last configured menuitem. If +menuitem to the end of the last configured menuitem. +If .Va menu_options is configured, the .Dq Li Reboot
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