Date: Sat, 22 Nov 2008 13:29:49 +0200 From: Kostik Belousov <kostikbel@gmail.com> To: Kip Macy <kmacy@freebsd.org> Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r185162 - in head: . sys/amd64/include sys/arm/include sys/conf sys/dev/bce sys/dev/cxgb sys/dev/cxgb/sys sys/dev/cxgb/ulp/iw_cxgb sys/dev/mxge sys/dev/nxge sys/i386/include sys/i386/in... Message-ID: <20081122112949.GA6408@deviant.kiev.zoral.com.ua> In-Reply-To: <200811220555.mAM5tuIJ007781@svn.freebsd.org> References: <200811220555.mAM5tuIJ007781@svn.freebsd.org>
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--d6Gm4EdcadzBjdND Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Nov 22, 2008 at 05:55:56AM +0000, Kip Macy wrote: > Author: kmacy > Date: Sat Nov 22 05:55:56 2008 > New Revision: 185162 > URL: http://svn.freebsd.org/changeset/base/185162 >=20 > Log: > - bump __FreeBSD version to reflect added buf_ring, memory barriers, > and ifnet functions > =20 > - add memory barriers to <machine/atomic.h> > Modified: head/sys/i386/include/atomic.h > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D > --- head/sys/i386/include/atomic.h Sat Nov 22 01:48:20 2008 (r185161) > +++ head/sys/i386/include/atomic.h Sat Nov 22 05:55:56 2008 (r185162) > @@ -32,6 +32,21 @@ > #error this file needs sys/cdefs.h as a prerequisite > #endif > =20 > + > +#if defined(I686_CPU) > +#define mb() __asm__ __volatile__ ("mfence;": : :"memory") > +#define wmb() __asm__ __volatile__ ("sfence;": : :"memory") > +#define rmb() __asm__ __volatile__ ("lfence;": : :"memory") > +#else > +/* > + * do we need a serializing instruction? > + */ > +#define mb() > +#define wmb() > +#define rmb() > +#endif > + > + > /* > * Various simple operations on memory, each of which is atomic in the > * presence of interrupts and multiple processors. AFAIR, sfence instruction was added with the Pentium III processor (SSE), while lfence was introduced with the Pentium 4 (SSE2). I think that #ifdef I686_CPU handling of the fences is wrong. We need to use a serialized instruction on CPUs that does not support corresponding fence, if needed. --d6Gm4EdcadzBjdND Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (FreeBSD) iEYEARECAAYFAkkn7SwACgkQC3+MBN1Mb4h8wACfVEKbjr0rNd5NS/gEQvt6jqHW gWoAnjKiPP1SnrpY8Q9OoELavQ16Ew8n =I9l2 -----END PGP SIGNATURE----- --d6Gm4EdcadzBjdND--
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