Date: Sun, 29 Sep 2013 07:50:31 -0700 From: Adrian Chadd <adrian@freebsd.org> To: Warner Losh <imp@bsdimp.com> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: [rfc] mips74k/ar9344 support Message-ID: <CAJ-Vmo=SN93e4rez7Lt%2B_qhBt6dRqXOURUPU5tAZ4Cks_DeCzw@mail.gmail.com> In-Reply-To: <945A50E4-685D-4CC7-88B5-89278744E389@bsdimp.com> References: <CAJ-Vmo=pJfPryJ8eEKs7xRMsBUxC=xc2DtZfqsOfLKuXRhredA@mail.gmail.com> <CAJ-VmokBGYYZ1BdghEhYatVBbgH-pNKde-HQXCOfyuR35SrSAA@mail.gmail.com> <945A50E4-685D-4CC7-88B5-89278744E389@bsdimp.com>
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Hi, Right: http://people.freebsd.org/~adrian/mips/20130929-mips74k-3.diff -adrian On 29 September 2013 07:43, Warner Losh <imp@bsdimp.com> wrote: > I'd be tempted to use 'sll zero, 3' instead of '.word 0xc0' and define a > macro for it. Why 'sll zero,3' instead of ehb? It allows us to use it on > older MIPS platforms as well... (because it will assemble in other modes, > not for binutils issues)... > > Speaking of which, I'd also change the last 'nop' on the HAZARD_DELAY and > ITLBNOPFIX to be 'sll zero, 3' as well. This will be an appropriate nop on > older kit, as well as 'fail safe' when someone starts to cope with newer > compilers. Ditto COP0_SYNC. > > On Sep 29, 2013, at 4:37 PM, Adrian Chadd wrote: > > > grr, wrong list. > > > > also, try this: > > > > http://people.freebsd.org/~adrian/mips/20130929-mips74k-2.diff<; > http://people.freebsd.org/~adrian/mips/20130929-mips74k-1.diff>; > > > > > > > > -adrian > > > > ---------- Forwarded message ---------- > > From: Adrian Chadd <adrian@freebsd.org> > > Date: 29 September 2013 04:38 > > Subject: [rfc] mips74k/ar9344 support > > To: "freebsd-wireless@freebsd.org" <freebsd-wireless@freebsd.org> > > > > > > Hi! > > > > Here's an initial hacked up patch to get the AR9344 to mountroot> . > > > > (Which isn't true - it panics due to missing PHY setup on if_arge; I'll > fix > > that up soon.) > > > > http://people.freebsd.org/~adrian/mips/20130929-mips74k-1.diff > > > > The specific changes: > > > > * add CPU_MIPS24KC and CPU_MIPS74KC > > * mips32r2 CPUs require an EHB as a hazard for things, rather than NOPs > > * mips74k cores have a different CCA (cache coherency attributes) than > the > > default - I lifted this from the netbsd mips support. > > > > now, the ar71xx CPUs are all currently marked as CPU_MIPS4KC. I'll follow > > this up with a commit to change that. There may be things we can optimise > > in the CPU_MIPS24KC case. > > > > Warner and I have started talking about how to properly fix all of the > > hazard handling. We'll discuss that later. > > > > I'd like to commit this to -HEAD so people wishing to hack on mips74k > > platforms can do stuff. Does anyone have any issues with the above? > > > > Thanks, > > > > > > > > -adrian > > _______________________________________________ > > freebsd-mips@freebsd.org mailing list > > http://lists.freebsd.org/mailman/listinfo/freebsd-mips > > To unsubscribe, send any mail to "freebsd-mips-unsubscribe@freebsd.org" > >
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