Date: Mon, 19 Sep 2011 08:23:32 -0400 From: John Baldwin <jhb@freebsd.org> To: freebsd-hackers@freebsd.org Cc: jfv@freebsd.org, pyunyh@gmail.com, Hooman Fazaeli <fazaeli@sepehrs.com>, Luigi Rizzo <rizzo@iet.unipi.it>, Arnaud Lacombe <lacombar@gmail.com> Subject: Re: intel checksum offload Message-ID: <201109190823.32871.jhb@freebsd.org> In-Reply-To: <CACqU3MV3MHGpV0SR36Ur9cPfGzh4K82dop1mXVRkk51mTCpTrQ@mail.gmail.com> References: <4E744BCE.7060302@sepehrs.com> <20110919020131.GA11657@onelab2.iet.unipi.it> <CACqU3MV3MHGpV0SR36Ur9cPfGzh4K82dop1mXVRkk51mTCpTrQ@mail.gmail.com>
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On Sunday, September 18, 2011 10:48:32 pm Arnaud Lacombe wrote: > As the PCI spec is not public, I've not been able to find out from the > few public datasheet how the PCI MSI-X capability field is first > programmed. I'd assume that the BIOS is using the data in the NVM to > program it at power up. "PCI System Architecture" is quite public at Amazon. It's not the spec, but it will certainly give you enough info to understand MSI and it covers the question you are asking well enough. The MSI config registers are not touched by the BIOS at all (at least not in a standard way). It is the responsibility of the device to setup the read-only fields in the MSI and MSI-X config registers on reset. -- John Baldwin
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