Date: Thu, 1 Jun 2006 15:04:30 -0400 From: John Baldwin <jhb@freebsd.org> To: freebsd-current@freebsd.org Cc: Andriy Gapon <avg@icyb.net.ua>, Nate Lawson <nate@root.org> Subject: Re: Freeze due to performance_cx_lowest=LOW Message-ID: <200606011504.31635.jhb@freebsd.org> In-Reply-To: <447D0B5C.3020901@root.org> References: <1148837064.00534930.1148826605@10.7.7.3> <447C1BBD.5020004@icyb.net.ua> <447D0B5C.3020901@root.org>
next in thread | previous in thread | raw e-mail | index | archive | help
On Tuesday 30 May 2006 23:19, Nate Lawson wrote: > Andriy Gapon wrote: > > on 29/05/2006 23:10 Nate Lawson said the following: > >> disable apic (hint.apic.0.disabled="1"). I isolated this a little while > >> ago to the change to enable LAPIC timer. However, there is currently no > >> easy way to disable the LAPIC timer with APIC enabled so you have to > >> disable APIC. jhb@ and I have been discussing how to do this better but > >> no easy answers apparently. > > > > I am not sure what I am talking about, but is it potentially possible to > > drive timer system by more than one clock, actively using the most > > precise of them at any particular moment ? So that if LAPIC timer stops > > i8254 can be used instead. > > That requires mixed mode delivery -- i8254 on legacy PIC irq and APIC > mode for other interrupts. jhb@ just killed this and isn't eager to add > it back. I'll let him explain if he has more to add. Namely that it is unreliable and expressly forbidden by the ACPI spec. -- John Baldwin
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200606011504.31635.jhb>