Date: Sat, 09 Jan 1999 18:01:43 +0100 From: sthaug@nethelp.no To: culverk@wam.umd.edu Cc: wollman@khavrinen.lcs.mit.edu, phiber@udel.edu, current@FreeBSD.ORG Subject: Re: FreeBSD Celeron and Celeron ( Mendocino ) kernel patch. Message-ID: <13814.915901303@verdi.nethelp.no> In-Reply-To: Your message of "Sat, 9 Jan 1999 11:58:42 -0500 (EST)" References: <Pine.GSO.3.95q.990109115739.9809A-100000@rac10.wam.umd.edu>
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> I wasn't disagreeing with that, I was just saying what I said about the > cache. Intel would have you believe that there is not any cache on the > Celeron. There are different Celeron models. The new models (300A, 333A etc.) have 128 kB L2 cache on the chip. The old (non-A) models *do not* have any L2 cache. AFAIK Intel has never made any secret about this. Steinar Haug, Nethelp consulting, sthaug@nethelp.no To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message
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