Date: Fri, 21 Jun 2002 02:49:58 +0100 (BST) From: =?iso-8859-1?q?Matt=20Sykes?= <mattmsykes@yahoo.co.uk> To: freebsd-hardware@freebsd.org Subject: [PATCH] P2L97-DS Message-ID: <20020621014958.31214.qmail@web21010.mail.yahoo.com>
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Could someone please explain why the P2L97-DS continues to remain
unsupported? The patch (by Tor Egge) has been around a long time, yet
for some reason has not made it into the source tree. FreeBSD is broken
without it.
As the mail archives will indicate, I went through *considerable*
effort in diagnosing problems with this motherboard which finally lead
me to this patch. Even though it's an old board, I see no reason to
put the next person through the same ordeal.
Here is the patch against 4.6-stable (and -release).
*** sys/pci/pcisupport.c.orig Fri Apr 19 05:52:15 2002
--- sys/pci/pcisupport.c Thu Jun 20 20:36:32 2002
***************
*** 87,92 ****
--- 87,171 ----
}
}
+ #ifdef SMP
+ static void
+ fix_82371ab_power_management(device_t dev)
+ {
+ int pmba;
+ int devctl;
+ int devctl_changed;
+ int devrese;
+ int devresg;
+
+ #define PMBA_CONFIG_OFFSET 0x40
+ #define PMBA_TO_IO(addr) (addr & 0xffc0)
+ #define DEVRESE_OFFSET 0x68
+ #define DEVRESG_OFFSET 0x70
+ #define DEVRES_MONITOR_ENABLE (1 << 20)
+ #define DEVCTL_IO_OFFSET 0x2c
+ #define DEVCTL_TRAP_DEV12 (1 << 24)
+ #define DEVCTL_TRAP_DEV13 (1 << 25)
+ #define RTC_IOADDR 0x70
+
+ pmba = pci_read_config(dev, PMBA_CONFIG_OFFSET, 4);
+
+ devctl = inl(PMBA_TO_IO(pmba) + DEVCTL_IO_OFFSET);
+ devctl_changed = 0;
+
+ devrese = pci_read_config(dev, DEVRESE_OFFSET, 2) |
+ (pci_read_config(dev, DEVRESE_OFFSET + 2, 1) << 16);
+
+ if ((devrese & DEVRES_MONITOR_ENABLE) != 0 &&
+ ((devrese >> 16) & 15) <= 7 &&
+ (devrese & 0xffff) == RTC_IOADDR &&
+ (devctl & DEVCTL_TRAP_DEV12) != 0) {
+
+ devrese &= ~DEVRES_MONITOR_ENABLE;
+ devctl &= ~DEVCTL_TRAP_DEV12;
+ devctl_changed = 1;
+
+ pci_write_config(dev, DEVRESE_OFFSET, 2, (devrese & 0xffff));
+ pci_write_config(dev, DEVRESE_OFFSET + 2, 1,
+ (devrese >> 16) & 0xff);
+
+ printf("Disabled Device 12 trap SMI for access to RTC
chip\n");
+ }
+
+ devresg = pci_read_config(dev, DEVRESG_OFFSET, 2) |
+ (pci_read_config(dev, DEVRESG_OFFSET + 2, 1) << 16);
+
+ if ((devresg & DEVRES_MONITOR_ENABLE) != 0 &&
+ ((devresg >> 16) & 15) <= 7 &&
+ (devresg & 0xffff) == RTC_IOADDR &&
+ (devctl & DEVCTL_TRAP_DEV13) != 0) {
+
+ devresg &= ~DEVRES_MONITOR_ENABLE;
+ devctl &= ~DEVCTL_TRAP_DEV13;
+ devctl_changed = 1;
+
+ pci_write_config(dev, DEVRESG_OFFSET, 2, (devresg & 0xffff));
+ pci_write_config(dev, DEVRESG_OFFSET + 2, 1,
+ (devresg >> 16) & 0xff);
+
+ printf("Disabled Device 13 trap SMI for access to RTC
chip\n");
+ }
+
+ if (devctl_changed != 0) {
+ outl(PMBA_TO_IO(pmba) + DEVCTL_IO_OFFSET, devctl);
+ }
+
+ #undef PMBA_CONFIG_OFFSET
+ #undef PMBA_TO_IO
+ #undef DEVRESE_OFFSET
+ #undef DEVRESG_OFFSET
+ #undef DEVRES_MONITOR_ENABLE
+ #undef DEVCTL_IO_OFFSET
+ #undef DEVCTL_TRAP_DEV12
+ #undef DEVCTL_TRAP_DEV13
+ #undef RTC_IOADDR
+ }
+ #endif
+
static void
fixwsc_natoma(device_t dev)
{
***************
*** 1212,1217 ****
--- 1291,1299 ----
case 0x71008086:
return ("Intel 82439TX System controller (MTXC)");
case 0x71138086:
+ #if defined(SMP)
+ fix_82371ab_power_management(dev);
+ #endif
return ("Intel 82371AB Power management controller");
case 0x719b8086:
return ("Intel 82443MX Power management controller");
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