Date: Sun, 13 Oct 2002 12:08:47 -0600 (MDT) From: "M. Warner Losh" <imp@bsdimp.com> To: tlambert2@mindspring.com Cc: ticso@cicely.de, hch@infradead.org, wes@softweyr.com, dillon@apollo.backplane.com, vova@sw.ru, nate@root.org, arch@FreeBSD.org Subject: Re: Database indexes and ram Message-ID: <20021013.120847.31902907.imp@bsdimp.com> In-Reply-To: <3DA9B4A8.194A02FC@mindspring.com> References: <3DA954CF.98B0891A@mindspring.com> <20021013.060851.113437955.imp@bsdimp.com> <3DA9B4A8.194A02FC@mindspring.com>
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In message: <3DA9B4A8.194A02FC@mindspring.com>
Terry Lambert <tlambert2@mindspring.com> writes:
: "M. Warner Losh" wrote:
: > In message: <3DA954CF.98B0891A@mindspring.com>
: > Terry Lambert <tlambert2@mindspring.com> writes:
: > : In most cases, the DMA gets put directly into memory mapped by the
: > : VM of the kernel (the KVA).
: >
: > Actually, in most cases on i386 the memory gets DMAd to a phyiscal
: > address, which is why there is a 4G limit in the hardware. Since it
: > is a phyiscal address, knowing VM tricks I don't think is relevant.
: > PAE is basically a vm trick.
:
: You've taken the argument out of context. The argument is about:
:
: 1) The interrupt handler for the completed DMA
:
: 2) The fact that most data which is DMA'ed ends up being shared
: between multiple processes
:
: 3) The fact that the VM and buffer cache are unified, so that
: even if you wanted to do explicit coherency between multiple
: copies of DMA'ed data, you would not be able to, unless they
: occurred into a region which was not replicated, which means
: one which was shared, which means "in the KVA", which means
: "not in the bank selected PAE/PSE-36 window".
I think that's all irrelevant. Cards with 32bits can't go about 4GB.
It is a far more fundamental problem. Even 32bit cards in 64bit slots
can't do this. 64bit cards could DMA into anywhere in the first
64bits of RAM, of course.
However, you are at least partially right about what you say, I think.
When DMAing into high memory, you'd still have to arrange for those
physical pages to be in the process that you are talking about
(because each process still has a 4G size limit, and I think it has to
be all in the same segment unless it is PAE/PSE aware).
I was confusing what you said with "The DMA is based on a virtual
address" which is not quite the same thing.
Warner
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