Date: Wed, 28 Mar 2007 13:07:17 +0900 From: Pyun YongHyeon <pyunyh@gmail.com> To: Yuri Pankov <y.pankov@irbis.net.ru> Cc: freebsd-current@freebsd.org Subject: Re: [nfe] NVIDIA nForce4 CK804 MCP9 isn't working Message-ID: <20070328040717.GA56450@cdnetworks.co.kr> In-Reply-To: <20070327221801.GA957@darklight.abyss.local> References: <20070327221801.GA957@darklight.abyss.local>
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--FCuugMFkClbJLl1L Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Mar 28, 2007 at 02:18:02AM +0400, Yuri Pankov wrote: > Hi, > > I've tried to use if_nfe with NVIDIA nForce4 CK804 MCP9 NIC (was > using if_nve before without issues). > > FreeBSD 7.0-CURRENT #3: Wed Mar 28 00:44:12 MSD 2007 amd64 > > almost GENERIC kernel, only changes are SCHED_ULE and nodevice nve. > > dmesg: > nfe0: <NVIDIA nForce4 CK804 MCP9 Networking Adapter> port 0xe800-0xe807 > mem 0xf5102000-0xf5102fff irq 23 at device 10.0 on pci0 > nfe0: using obsoleted if_watchdog interface > nfe0: bpf attached > nfe0: Ethernet address: 00:0f:ea:7d:f3:20 > nfe0: [MPSAFE] > nfe0: [ITHREAD] > miibus1: <MII bus> on nfe0 > ciphy0: <Cicada CS8201 10/100/1000TX PHY> PHY 7 on miibus1 > ciphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, > 1000baseT-FDX, auto > nfe0: link state changed to DOWN > nfe0: gigabit link up > nfe0: link state changed to UP > > pciconf: > nfe0@pci0:10:0: class=0x068000 card=0xe0001458 chip=0x005710de rev=0xa3 > hdr=0x00 > vendor = 'Nvidia Corp' > device = 'nForce4 Ultra NVidia Network Bus Enumerator' > class = bridge > > ifconfig: > nfe0: flags=8843<UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST> metric 0 mtu > 1500 > options=2b<RXCSUM,TXCSUM,VLAN_MTU,JUMBO_MTU> > ether 00:0f:ea:7d:f3:20 > inet 10.10.10.1 netmask 0xffffff00 broadcast 10.10.10.255 > media: Ethernet autoselect (1000baseTX <full-duplex>) > status: active > > ping 10.10.10.2 gives following tcpdump output: > 01:45:37.304300 arp who-has 10.10.10.2 tell 10.10.10.1 > 01:45:38.305363 arp who-has 10.10.10.2 tell 10.10.10.1 > 01:45:39.306300 arp who-has 10.10.10.2 tell 10.10.10.1 > and so on... > > arp -a: > ? (10.10.10.2) at (incomplete) on nfe0 [ethernet] > > Manually changing media options, -rxcsum, -txcsum, adding static ARP > entry for 10.10.10.2 doesn't help. > > (and to mention once more, exactly the same setup, including ethernet > media options, works with if_nve). > How about new nfe(4) in the following URL? http://people.freebsd.org/~yongari/nfe/if_nfe.c http://people.freebsd.org/~yongari/nfe/if_nfereg.h http://people.freebsd.org/~yongari/nfe/if_nfevar.h I'm not sure but you may also need to apply attached ciphy(4) patch. > -- > Yuri -- Regards, Pyun YongHyeon --FCuugMFkClbJLl1L Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="ciphy.patch" Index: ciphy.c =================================================================== RCS file: /home/ncvs/src/sys/dev/mii/ciphy.c,v retrieving revision 1.8 diff -u -r1.8 ciphy.c --- ciphy.c 2 Dec 2006 19:36:25 -0000 1.8 +++ ciphy.c 28 Mar 2007 03:58:10 -0000 @@ -91,6 +91,7 @@ MII_PHY_DESC(CICADA, CS8201), MII_PHY_DESC(CICADA, CS8201A), MII_PHY_DESC(CICADA, CS8201B), + MII_PHY_DESC(VITESSE, VSC8601), MII_PHY_END }; @@ -339,7 +340,25 @@ static void ciphy_reset(struct mii_softc *sc) { + struct mii_data *mii; + uint16_t val; + mii = sc->mii_pdata; + if (strcmp(device_get_name(device_get_parent(sc->mii_dev)), + "nfe") == 0) { + /* need to set for 2.5V RGMII for NVIDIA adapters */ + val = PHY_READ(sc, CIPHY_MII_ECTL1); + val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL); + val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII); + PHY_WRITE(sc, CIPHY_MII_ECTL1, val); + /* From Linux. */ + val = PHY_READ(sc, CIPHY_MII_AUXCSR); + val |= CIPHY_AUXCSR_MDPPS; + PHY_WRITE(sc, CIPHY_MII_AUXCSR, val); + val = PHY_READ(sc, CIPHY_MII_10BTCSR); + val |= CIPHY_10BTCSR_ECHO; + PHY_WRITE(sc, CIPHY_MII_10BTCSR, val); + } mii_phy_reset(sc); DELAY(1000); } @@ -396,6 +415,8 @@ } break; + case MII_MODEL_VITESSE_VSC8601: + break; default: device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n", model); Index: ciphyreg.h =================================================================== RCS file: /home/ncvs/src/sys/dev/mii/ciphyreg.h,v retrieving revision 1.2 diff -u -r1.2 ciphyreg.h --- ciphyreg.h 6 Jan 2005 01:42:55 -0000 1.2 +++ ciphyreg.h 28 Mar 2007 03:58:11 -0000 @@ -251,6 +251,16 @@ /* Extended PHY control register #1 */ #define CIPHY_MII_ECTL1 0x17 #define CIPHY_ECTL1_ACTIPHY 0x0020 /* Enable ActiPHY power saving */ +#define CIPHY_ECTL1_IOVOL 0x0e00 /* MAC interface and I/O voltage select */ +#define CIPHY_ECTL1_INTSEL 0xf000 /* select MAC interface */ + +#define CIPHY_IOVOL_3300MV 0x0000 /* 3.3V for I/O pins */ +#define CIPHY_IOVOL_2500MV 0x0200 /* 2.5V for I/O pins */ + +#define CIPHY_INTSEL_GMII 0x0000 /* GMII/MII */ +#define CIPHY_INTSEL_RGMII 0x1000 +#define CIPHY_INTSEL_TBI 0x2000 +#define CIPHY_INTSEL_RTBI 0x3000 /* Extended PHY control register #2 */ #define CIPHY_MII_ECTL2 0x18 Index: miidevs =================================================================== RCS file: /home/ncvs/src/sys/dev/mii/miidevs,v retrieving revision 1.41 diff -u -r1.41 miidevs --- miidevs 21 Feb 2007 18:17:44 -0000 1.41 +++ miidevs 28 Mar 2007 03:58:11 -0000 @@ -66,6 +66,7 @@ oui SIS 0x00e006 Silicon Integrated Systems oui TDK 0x00c039 TDK oui TI 0x080028 Texas Instruments +oui VITESSE 0x0001c1 Vitesse Semiconductor oui XAQTI 0x00e0ae XaQti Corp. oui MARVELL 0x005043 Marvell Semiconductor oui xxMARVELL 0x000ac2 Marvell Semiconductor @@ -135,6 +136,7 @@ /* Cicada Semiconductor PHYs (now owned by Vitesse?) */ model CICADA CS8201 0x0001 Cicada CS8201 10/100/1000TX PHY +model VITESSE VSC8601 0x0002 VSC8601 10/100/1000TX PHY model CICADA CS8201A 0x0020 Cicada CS8201 10/100/1000TX PHY model CICADA CS8201B 0x0021 Cicada CS8201 10/100/1000TX PHY --FCuugMFkClbJLl1L--
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