Date: Thu, 7 Jun 2007 02:39:12 -0700 (PDT) From: Neil Bradley <nb@synthcom.com> Cc: arm@freebsd.org Subject: Re: 4-bit SD Card mode Message-ID: <20070607023728.X43808@synthcom.com> In-Reply-To: <53054.2001:6f8:101e:0:20e:cff:fe6d:6adb.1181203617.squirrel@webmail.alpha-tierchen.de> References: <50503.2001:6f8:101e:0:20e:cff:fe6d:6adb.1181202550.squirrel@webmail.alpha-tierchen.de> <20070607005128.T43808@synthcom.com> <53054.2001:6f8:101e:0:20e:cff:fe6d:6adb.1181203617.squirrel@webmail.alpha-tierchen.de>
next in thread | previous in thread | raw e-mail | index | archive | help
>> I've done SD drivers, both 1 and 4 bit, DMA and programmed I/O, on the >> PXA270, Atmel SAM7, Atmel SAM9, and Freescale MX31 CPUs. How may I be of >> assistance? > Actually the driver does the whole status and error handling using an > interrupt service routine. This is unsuitable in 4-bit mode because in > this mode the interrupt line is shared with a data line. So to get 4-bit > mode working it is necessary to know the complete definition of the > "interrupt period" - the period where it is allowed to enable the > interrupt during 4-bit mode. Hm... I haven't ever heard of nor needed to consider such a thing in any of my implementations. The controllers I've encountered all have a "1 bit/4 bit" mode setting, and as long as you tell the card to go in to 4 bit mode and set it in the hardware as well, the SD controller handles everything for you. What is the CPU in question? -->Neil ---------------------------------------------------------------------------- C. Neil Bradley - KE7IXP - The one eyed man in the land of the blind is not king. He's a prisoner.
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20070607023728.X43808>