Date: Thu, 16 May 2013 19:10:26 +0100 From: Joe Holden <lists@rewt.org.uk> To: Milan Obuch <freebsd-mips@dino.sk> Cc: Aleksandr Rybalko <ray@ddteam.net>, freebsd-mips@freebsd.org Subject: Re: Ubiquiti EdgeRouter Lite works multi-user with -CURRENT. Message-ID: <51952112.9010607@rewt.org.uk> In-Reply-To: <20130516124248.33ae4e05@wind.dino.sk> References: <CACVs6=_UHMvo6DSyXzvXxJ0eCcSsC%2Bk3yZ42ia5TGzgHduT2zA@mail.gmail.com> <20130516111059.38543d57@wind.dino.sk> <20130516131642.adfae355aa3bf7767e9b56e5@ddteam.net> <20130516124248.33ae4e05@wind.dino.sk>
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Milan Obuch wrote: > On Thu, 16 May 2013 13:16:42 +0300 > Aleksandr Rybalko <ray@ddteam.net> wrote: > >> Hi Milan! >> >> On Thu, 16 May 2013 11:10:59 +0200 >> Milan Obuch <freebsd-mips@dino.sk> wrote: >> > > [ snip ] > >>> Has anybody any source for some more hardware information? Looking >>> on opened box, there are three things interesting for me: >>> >>> - there is z 2x7 'holes area' (ready for soldering 2x7 pin header) >>> labeled J1. Does anybody know anything about it? Googling for >>> edgerouter J1 pin header does not produce anything usable. >> It's possible this one is EJTAG (same JTAG but more standardized by >> MIPS). If it has pins 2,4,6,8,10 grounded, but at least 14th routed to >> one of power source (most common 3.3v), then it is 95% possible EJTAG. >> > > Thanks for tip, I will look there - I just put those two screws to > close the box, so only some time afternoon/evening or tomorrow. It > looks like highly probable. > >>> - near an J1 area, there are two SMD LEDs. Both are on. On PCB, >>> there are labels D34 and D35. Any idea what are they intended for? >>> Could they be user controlled? Not much usefull when the box is >>> closed, but anyway... >>> >>> - there is a reset switch accessible from outside, marked SW1 on >>> PCB. When running FreeBSD, however, it has no efect. Any idea how >>> it could be used for launching some user action? Maybe it could be >>> accessible via GPIO driver, probably not written yet... >> Can't recall if I ever test it, but Juli commit it long ago: >> sys/mips/cavium/octeon_gpio.c >> > > for this quick test I used OCTEON1 kernel config with some necessary > tweaks, device gpio is commented out, maybe this will be enough for > enable octeon_gpio.c (looking at files.octeon1 it seems to be > possible). I will test it, definitely. > There is only one pin exposed via gpio: root@erl1:~ # gpioctl -f /dev/gpioc0 -l -v pin 07: 0 F/D<IN>, caps:<IN,OUT> Not sure if it maps to anything usable, haven't played with it yet - the other header is EJTAG according to Cavium docs. Thanks > Thanks! > > regards, > Milan
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