Date: Fri, 31 Mar 2023 21:11:14 +0100 From: Ruslan Bukin <br@bsdpad.com> To: John Baldwin <jhb@freebsd.org> Cc: arch@freebsd.org Subject: Re: Deprecate/remove riscv64sf Message-ID: <ZCc%2BYcM/iVCC73TK@bsdpad.com> Resent-Message-ID: <ZCc/IefIpXjsL4P5@bsdpad.com> In-Reply-To: <629bf85d-4d48-17f5-cb26-dfd29f7e6ff7@FreeBSD.org> References: <629bf85d-4d48-17f5-cb26-dfd29f7e6ff7@FreeBSD.org>
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On Wed, Mar 29, 2023 at 11:17:21AM -0700, John Baldwin wrote: > Is anyone using riscv64sf? All of the existing RISC-V boards include hard-float > support as well as QEMU. The FPGA cores we use at Cambridge also all support > hard-float. My understanding is that glibc doesn't bother supporting soft-float > on RV64. If no one is using it (and has no plans to use it), then I propose > we drop it in 14.0 and save one more buildworld from make tinderbox. > The idea behind this was to support extensibility of architecture (which is one of the key features of RISC-V). So if F,D,Q extension is not implemented, then riscv64sf could be used. It could be that those times some simulators/emulators did not support these extensions, so riscv64sf created (I could not remember). It could be some of new (synthesized) hardware or new emulators won't have support for this straight away. So in research&development perspective it could be useful, in real life probably not for 64 bit. Ruslan
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