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Date:      Sun, 13 Jun 2004 13:05:37 GMT
From:      Juli Mallett <jmallett@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 54816 for review
Message-ID:  <200406131305.i5DD5bqV041327@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=54816

Change 54816 by jmallett@jmallett_oingo on 2004/06/13 13:05:08

	Push IMC address over to hints.

Affected files ...

.. //depot/projects/mips/sys/mips/conf/INDY.hints#2 edit
.. //depot/projects/mips/sys/mips/sgimips/imc/imc.c#7 edit

Differences ...

==== //depot/projects/mips/sys/mips/conf/INDY.hints#2 (text+ko) ====

@@ -1,4 +1,5 @@
-# $P4: //depot/projects/mips/sys/mips/conf/INDY.hints#1 $
+# $P4: //depot/projects/mips/sys/mips/conf/INDY.hints#2 $
 hint.hpc.0.port="0x1fb80000"
 hint.hpc.1.port="0x1fb00000"
 hint.hpc.2.port="0x1f980000"
+hint.imc.0.port="0x1fa00000"

==== //depot/projects/mips/sys/mips/sgimips/imc/imc.c#7 (text+ko) ====

@@ -23,7 +23,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $P4: //depot/projects/mips/sys/mips/sgimips/imc/imc.c#6 $
+ * $P4: //depot/projects/mips/sys/mips/sgimips/imc/imc.c#7 $
  */
 
 #include <sys/cdefs.h>
@@ -62,7 +62,7 @@
 };
 
 static driver_t imc_driver = {
-	"imc", imc_methods, 1
+	"imc", imc_methods, sizeof (long)
 };
 
 static const char *imc_devices[] = {
@@ -70,8 +70,6 @@
 	NULL
 };
 
-static const u_long imc_port = 0x1fa00000; /* XXX hints */
-
 #define	IMC_READ_4(port, r)					\
 	bus_space_read_4(device_space_tag, (port), (r))
 
@@ -82,6 +80,9 @@
 imc_probe(device_t dev)
 {
 	const char **namep;
+	int error;
+	long *scp;
+	long port;
 
 	if (device_get_unit(dev) != 0)
 		return (ENXIO);
@@ -89,6 +90,13 @@
 	switch (mach_type) {
 	case MACH_SGI_IP22:
 		device_set_desc(dev, "IMC Bus");
+		error = resource_long_value(device_get_name(dev),
+					    device_get_unit(dev),
+					    "port", &port);
+		if (error != 0)
+			return (ENODEV);
+		scp = device_get_softc(dev);
+		*scp = port;
 		for (namep = imc_devices; *namep != NULL; namep++)
 			device_add_child(dev, *namep, -1);
 		return (0);
@@ -100,10 +108,15 @@
 static int
 imc_attach(device_t dev)
 {
+	long port;
+	long *scp;
 	uint32_t reg;
 	uint32_t sysid;
 
-	sysid = IMC_READ_4(imc_port, IMC_SYSID);
+	scp = device_get_softc(dev);
+	port = *scp;
+
+	sysid = IMC_READ_4(port, IMC_SYSID);
 	/* IP24 lies about having EISA.  Don't believe its sugary-sweet lies! */
 	if (mach_subtype == MACH_SGI_IP22_GUINESS)
 		sysid &= ~IMC_SYSID_HAVEISA;
@@ -111,8 +124,8 @@
 		      sysid & IMC_SYSID_HAVEISA ?  "present" : "not present");
 
 	/* Clear error status. */
-	IMC_WRITE_4(imc_port, IMC_CPU_ERRSTAT, 0);
-	IMC_WRITE_4(imc_port, IMC_GIO_ERRSTAT, 0);
+	IMC_WRITE_4(port, IMC_CPU_ERRSTAT, 0);
+	IMC_WRITE_4(port, IMC_GIO_ERRSTAT, 0);
 
 	/*
 	 * Enable parity reporting on GIO/main memory transactions.
@@ -122,15 +135,15 @@
 	 * has the opposite sense... Turning it on turns the checks off!).
 	 * Finally, turn on interrupt writes to the CPU from the MC.
 	 */
-	reg = IMC_READ_4(imc_port, IMC_CPUCTRL0);
+	reg = IMC_READ_4(port, IMC_CPUCTRL0);
 	reg &= ~IMC_CPUCTRL0_NCHKMEMPAR;
 	reg |= (IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR | IMC_CPUCTRL0_INTENA);
-	IMC_WRITE_4(imc_port, IMC_CPUCTRL0, reg);
+	IMC_WRITE_4(port, IMC_CPUCTRL0, reg);
 
 	/* Setup the MC write buffer depth */
-	reg = IMC_READ_4(imc_port, IMC_CPUCTRL1);
+	reg = IMC_READ_4(port, IMC_CPUCTRL1);
 	reg = (reg & ~IMC_CPUCTRL1_MCHWMSK) | 13;
-	IMC_WRITE_4(imc_port, IMC_CPUCTRL1, reg);
+	IMC_WRITE_4(port, IMC_CPUCTRL1, reg);
 
 	/*
 	 * Set GIO64 arbitrator configuration register:
@@ -139,7 +152,7 @@
 	 * on the graphics variant present and I'm not sure how to figure
 	 * that out or 100% sure what the correct settings are for each.
 	 */
-	reg = IMC_READ_4(imc_port, IMC_GIO64ARB);
+	reg = IMC_READ_4(port, IMC_GIO64ARB);
 	reg &= (IMC_GIO64ARB_GRX64 | IMC_GIO64ARB_GRXRT | IMC_GIO64ARB_GRXMST);
 
 	/* GIO64 invariant for all IP22 platforms: one GIO bus, HPC1 @ 64 */
@@ -168,7 +181,7 @@
 		}
 		break;
 	}
-	IMC_WRITE_4(imc_port, IMC_GIO64ARB, reg);
+	IMC_WRITE_4(port, IMC_GIO64ARB, reg);
 
 	bus_generic_attach(dev);
 



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