Date: Thu, 23 Aug 2012 07:46:57 -0400 From: John Baldwin <jhb@freebsd.org> To: Oleksandr Tymoshenko <gonzo@freebsd.org> Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r239597 - head/sys/arm/arm Message-ID: <201208230746.57495.jhb@freebsd.org> In-Reply-To: <201208222248.q7MMmojL011382@svn.freebsd.org> References: <201208222248.q7MMmojL011382@svn.freebsd.org>
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On Wednesday, August 22, 2012 6:48:50 pm Oleksandr Tymoshenko wrote: > Author: gonzo > Date: Wed Aug 22 22:48:50 2012 > New Revision: 239597 > URL: http://svn.freebsd.org/changeset/base/239597 > > Log: > Do not change "cachable" attribute for DMA memory allocated with > BUS_DMA_COHERENT attribute > > The minimum unit for changing "cachable" attribute is page, so call > to pmap_change_attr effectively disable cache for all pages that newly > allocated DMA memory region spans on. The problem is that general-purpose > memory could reside on these pages too and disabling cache might affect > performance. Moreover ldrex/strex operators raise Data Abort exception > when accessing memory on page with "cachable" attribute off. > > BUS_DMA_COHERENT does nto require memory to be coherent. It just suggests > to do best effort for reducing synchronization overhead. Alternatively you could force an allocation with BUS_DMA_COHERENT to always allocate at least one page. Also, it is probably better to match what I recently did in x86 and use kmem_alloc_contig() or kmem_alloc_attr() for allocations with a custom memory attribute rather than using pmap_change_attr() directly. -- John Baldwin
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