Date: Thu, 7 Nov 2002 08:07:46 -0800 (PST) From: Thomas Moestl <tmm@FreeBSD.org> To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/sparc64/ebus ebus.c src/sys/sparc64/include ofw_bus.h ver.h src/sys/sparc64/isa isa.c src/sys/sparc64/pci ofw_pci.c ofw_pci.h psycho.c src/sys/sparc64/sparc64 machdep.c ofw_bus.c Message-ID: <200211071607.gA7G7kXF023424@repoman.freebsd.org>
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tmm 2002/11/07 08:07:46 PST
Modified files:
sys/sparc64/ebus ebus.c
sys/sparc64/include ofw_bus.h ver.h
sys/sparc64/isa isa.c
sys/sparc64/pci ofw_pci.c ofw_pci.h psycho.c
sys/sparc64/sparc64 machdep.c ofw_bus.c
Log:
Add two new workaround for firmware anomalies:
1. At least some Netra t1 models have PCI buses with no associated
interrupt map, but obviously expect the PCI swizzle to be done with
the interrupt number from the higher level as intpin. In this case,
the mapping also needs to continue at parent bus nodes.
To handle that, add a quirk table based on the "name" property of
the root node to avoid breaking other boxen. This property is now
retrieved and printed at boot.
2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped
at all, and full interrupt numbers (not just INOs) are given in
the interrupt properties. This is more or less cosmetical; the
PCI interrupt numbers would be wrong, but the psycho resource
allocation method would pass the right numbers on anyway.
Tested by: mux (1), Maxim Mazurok <maxim@km.ua> (2)
Revision Changes Path
1.5 +1 -1 src/sys/sparc64/ebus/ebus.c
1.3 +4 -1 src/sys/sparc64/include/ofw_bus.h
1.4 +1 -0 src/sys/sparc64/include/ver.h
1.5 +2 -1 src/sys/sparc64/isa/isa.c
1.5 +64 -8 src/sys/sparc64/pci/ofw_pci.c
1.4 +5 -2 src/sys/sparc64/pci/ofw_pci.h
1.17 +1 -1 src/sys/sparc64/pci/psycho.c
1.71 +5 -0 src/sys/sparc64/sparc64/machdep.c
1.3 +19 -4 src/sys/sparc64/sparc64/ofw_bus.c
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