Date: Sun, 10 Apr 2005 23:28:58 -0700 (PDT) From: Matthew Dillon <dillon@apollo.backplane.com> To: Scott Long <scottl@samsco.org> Cc: freebsd-current@freebsd.org Subject: Re: Potential source of interrupt aliasing Message-ID: <200504110628.j3B6Sw3m048327@apollo.backplane.com> References: <20050406233405.O47071@carver.gumbysoft.com> <200504081656.51917.jhb@FreeBSD.org> <20050410152946.W82708@carver.gumbysoft.com> <20050410172818.D82708@carver.gumbysoft.com> <200504110231.j3B2VOYr047361@apollo.backplane.com> <425A10DD.70500@samsco.org>
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Sheesh Scott, you don't have to be nasty about it. I'm just trying to help. I've seen billions of interrupt routing related problems but not one interrupt aliasing issue. What I/O APIC chipset and stepping does Doug have on that motherboard? Intel has a ton of errata for their I/O APICs. I see a mention of having to turn off earlier revs of the chip and revert to legacy 'boot interrupt' operation, but that's the only mention I see, and it's only for old versions (< B-0 stepping) of the 80332. Still, perhaps the BIOS is doing this even with later revs of the chip in the MB. There's a reference to the '80332 I/O Processor' developers manual which implies a more detailed explanation of 'boot interrupt' operation. http://www.intel.com/design/iio/specupdt/27392703.pdf -Matt
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