Date: Sun, 15 Jun 2014 16:13:08 +0100 From: Mark R V Murray <markm@FreeBSD.org> To: Michael Tuexen <tuexen@fh-muenster.de> Cc: Hans Petter Selasky <hps@selasky.org>, svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r266083 - in head/sys/arm: arm include Message-ID: <3841D090-5973-40B0-B61C-F15E8C1978C9@FreeBSD.org> In-Reply-To: <9B438991-C970-46A7-8116-A490E02D7139@fh-muenster.de> References: <201405141911.s4EJBFZZ097826@svn.freebsd.org> <537D0952.2040001@selasky.org> <7610C8E6-3F01-4317-BC1A-67645A162CD7@FreeBSD.org> <53871493.2010502@selasky.org> <EE7E19AA-BE18-4740-A636-4DA3023A5392@FreeBSD.org> <9412A358-EBCB-4A5A-B728-2A15C50FC217@fh-muenster.de> <D118F546-0F32-429F-86F2-69BEE0EC2D2F@FreeBSD.org> <CC36082E-1DFD-4576-9653-970F93A3699C@fh-muenster.de> <FD5DF228-1B2B-48F9-8445-54BF5959FEDA@FreeBSD.org> <9B438991-C970-46A7-8116-A490E02D7139@fh-muenster.de>
next in thread | previous in thread | raw e-mail | index | archive | help
On 30 May 2014, at 09:42, Michael Tuexen <tuexen@fh-muenster.de> wrote:
> On 29 May 2014, at 21:21, Mark R V Murray <markm@FreeBSD.org> wrote:
>=20
>>=20
>> On 29 May 2014, at 19:27, Michael Tuexen <tuexen@fh-muenster.de> =
wrote:
>>=20
>>> On 29 May 2014, at 20:15, Mark R V Murray <markm@FreeBSD.org> wrote:
>>>=20
>>>>=20
>>>> On 29 May 2014, at 19:13, Michael Tuexen <tuexen@fh-muenster.de> =
wrote:
>>>>=20
>>>>>> I can make it work on RPI, but trying to find what else it =
will/won=92t work on is more problematic.
>>>>> Wouldn't it require to use different registers on the RPI? This =
would mean you
>>>>> would need more #ifdefs=85
>>>>=20
>>>> Thats the problem; too many #ifdefs.
>>> So you could just keep the code for now, but reduce the #ifdefs to =
the ones you
>>> know that work. Later on, you can replace it by the driver stuff=85
>>=20
>> That=92s what I was thinking, yes.
> Great. Let me know if you need testing support on the RPI=85
I=92ve come to the conclusion that my RPI-B is hosed. It doesn=92t even =
boot Raspian properly. Sorry about how long this has taken.
Please could someone with a working RPI please check that the following =
patch works (may need to apply by hand due to cut/paste).
Thanks, with repeated apologies.
M
--=20
Mark R V Murray
--- include/cpu.h (revision 267507)
+++ include/cpu.h (working copy)
@@ -25,7 +25,16 @@
* Read PMCCNTR. Curses! Its only 32 bits.
* TODO: Fix this by catching overflow with interrupt?
*/
+/* The ARMv6 vs ARMv7 divide is going to need a better way of
+ * distinguishing between them.
+ */
+#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
+ /* ARMv6 - Earlier model SCCs */
+ __asm __volatile("mrc p15, 0, %0, c15, c12, 1": "=3Dr" (ccnt));
+#else
+ /* ARMv7 - Later model SCCs */
__asm __volatile("mrc p15, 0, %0, c9, c13, 0": "=3Dr" (ccnt));
+#endif
ccnt64 =3D (uint64_t)ccnt;
return (ccnt64);
#else /* No performance counters, so use binuptime(9). This is slooooow =
*/
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?3841D090-5973-40B0-B61C-F15E8C1978C9>