Date: Thu, 12 Sep 1996 13:21:51 +0100 From: Simon Marlow <simonm@dcs.gla.ac.uk> To: KATO Takenori <kato@eclogite.eps.nagoya-u.ac.jp> Cc: dg@Root.COM, current@freebsd.org Subject: Re: patch for Cyrix/Ti 486SLC/DLC CPU bug Message-ID: <199609121223.FAA03098@freefall.freebsd.org> In-Reply-To: Your message of "Thu, 12 Sep 1996 00:32:10 %2B0900." <199609111532.AAA02373@marble.eps.nagoya-u.ac.jp>
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> Sorry, I lost Cyrix's data book and I couldn't check official > information. I think Cyrix chip supports selective TLB update, but it > may have bug and LMSW instruction fails in some cases. I think this > depends on the version of CPU because some Cyrix machines works without > pmap.c change. As a data point, my Cyrix 486DLC 2/80 appears to work fine without these patches. It's probably quite a recent stepping, though. Cheers, Simon -- Simon Marlow simonm@dcs.gla.ac.uk Research Assistant http://www.dcs.gla.ac.uk/~simonm/ finger for PGP public key
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