Date: Wed, 17 Feb 2010 06:43:37 +0000 (UTC) From: Neel Natu <neel@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/mips/mips bus_space_generic.c src/sys/mips/sibyte sb_asm.S sb_bus_space.h sb_zbpci.c Message-ID: <201002170643.o1H6ht5l060226@repoman.freebsd.org>
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neel 2010-02-17 06:43:37 UTC
FreeBSD src repository
Modified files:
sys/mips/mips bus_space_generic.c
sys/mips/sibyte sb_asm.S sb_zbpci.c
Added files:
sys/mips/sibyte sb_bus_space.h
Log:
SVN rev 203985 on 2010-02-17 06:43:37Z by neel
Various fixes to get the SWARM config working on a big-endian Sibyte CPU.
Getting the little-endian PCI bus working on the big-endian CPU proved to be
quite challenging. We let the PCI devices be mapped in the "match byte lanes"
address window. This is where they are mapped by the CFE and DMA transfers
generated to or from addresses within this window are not subject to automatic
byte-swapping.
However any access by the driver to memory-mapped pci space is redirected
via the "match bit lanes" address window. We get the benefit of automatic
byte swapping through this address window and drivers don't need to change
to deal with CPU big-endianness.
Revision Changes Path
1.3 +8 -0 src/sys/mips/mips/bus_space_generic.c
1.4 +3 -2 src/sys/mips/sibyte/sb_asm.S
1.1 +43 -0 src/sys/mips/sibyte/sb_bus_space.h (new)
1.5 +151 -6 src/sys/mips/sibyte/sb_zbpci.c
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