Date: Thu, 29 Sep 2011 10:12:46 -0400 From: Andrew Duane <aduane@juniper.net> To: Jayachandran C. <c.jayachandran@gmail.com>, Adrian Chadd <adrian@freebsd.org> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: RE: eventtimer issue on mips: temporary workaround Message-ID: <AC6674AB7BC78549BB231821ABF7A9AEB8086A4A84@EMBX01-WF.jnpr.net> In-Reply-To: <CA%2B7sy7DpEEhZ7WGoT-p9FCgvGBAeBHnyGVXmcUtHs%2BTt6tsTng@mail.gmail.com> References: <CAJ-Vmo=qONOffCTgusWtbwuo43zKYyXDqqu5YEaL-MDQSbt-mQ@mail.gmail.com> <CAJ-Vmo=i6-3PNTPbP5xCftNU0w1OmMhZSysgaSRzDqgwLU6prQ@mail.gmail.com> <CA%2B7sy7DpEEhZ7WGoT-p9FCgvGBAeBHnyGVXmcUtHs%2BTt6tsTng@mail.gmail.com>
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I've been running JC's patch on my Octeon blade for a while, and it does fix some serious problems. It's been very stable. As to why "wait" wouldn't just return if an interrupt is asserted, I don't know. The MIPS manual is (deliberately?) vague on these details, but any software engineer can explain why that's needed to write correct software. Maybe the silicon engineers didn't listen? ................................... Andrew Duane Juniper Networks o +1 978 589 0551 m +1 603-770-7088 aduane@juniper.net > -----Original Message----- > From: owner-freebsd-mips@freebsd.org [mailto:owner-freebsd- > mips@freebsd.org] On Behalf Of Jayachandran C. > Sent: Wednesday, September 28, 2011 11:42 PM > To: Adrian Chadd > Cc: freebsd-mips@freebsd.org > Subject: Re: eventtimer issue on mips: temporary workaround > > On Wed, Sep 28, 2011 at 10:06 PM, Adrian Chadd <adrian@freebsd.org> > wrote: > > .. so, the patch is totallyw rong. > > > > intr_disable() needs to be moved before critical_enter() or it > doesn't > > achieve anything. > > I'm not able to figure out why... > > > But the race is still there, between intr_enable() and "wait". > > The only way to eliminate this race is to completely eliminate all > the > > code in cpu_idle(). > > the amd implementation seems to be using the STI instruction to enable > interrupts - but I'm not able to see how to avoid this race condition > on platforms which does not have a similar instruction. > > > Would someone clued in the implementation of wait please step up and > help? :) > > What if go back to the earlier version of cpu_idle which does not have > critical_enter() and cpu_idleclock() for now, or does this also have > issues? > > I had also seen issues on XLR which went away when I took out > 'ET_FLAGS_ONESHOT' from the mips clock event timer . That is another > possible workaround. > > JC. > _______________________________________________ > freebsd-mips@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-mips > To unsubscribe, send any mail to "freebsd-mips-unsubscribe@freebsd.org"home | help
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