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Date:      Thu, 19 Apr 2001 12:36:04 -0700
From:      Justin Wojdacki <justin.wojdacki.chiplogic.com@analog.com>
To:        freebsd-hackers@freebsd.org
Subject:   Re: The future of multiprocessors (was: SMP in 2.4 (fwd))
Message-ID:  <3ADF3E24.74661D46@chiplogic.com>
References:  <20010419121051.D72816@wantadilla.lemis.com> <5.0.2.1.0.20010418190439.03633920@mail.etinc.com> <Pine.LNX.4.21.0104182313560.1685-100000@imladris.rielhome.conectiva> <20010419121051.D72816@wantadilla.lemis.com> <5.1.0.14.0.20010419111106.02d68f50@vssad.hlo.dec.com>

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Michael Adler wrote:
> 
> A number of our larger customers care about computation/cubic foot.  The
> density of processors is important to them.  SMP machines work well here.
> 
> A future Alpha processor will be an SMT (symmetric multi threaded)
> machine.  Above the lowest levels, it will look like a multi-CPU
> machine.  The machine will keep multiple thread contexts live within the
> CPU and will be capable of switching between these threads in a single
> cycle.  As it grows harder for compilers to find parallelism within a
> single thread we have had to look elsewhere to keep the machine busy.
> 
> -Michael
> 

FWIW: The IBM Power3 CPU (AS/400 boxen) already has multiple hardware
threads.

IIRC, they don't exploit them largely because the compilers and OS
were having
a hard time figuring out how to use them. But the hardware can do it,
if they
so desire. 

I've found this to be a good general rule:

If it's worth doing in computing, IBM's probably already tried it. 

-- 
-------------------------------------------------
Justin Wojdacki        
justin@chiplogic.com               (408) 350-5032
Communications Processors Group -- Analog Devices

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