Date: Thu, 19 Nov 2009 22:53:41 +0000 (UTC) From: Pyun YongHyeon <yongari@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/dev/et if_et.c Message-ID: <200911192253.nAJMrwUt073548@repoman.freebsd.org>
index | next in thread | raw e-mail
yongari 2009-11-19 22:53:41 UTC
FreeBSD src repository
Modified files:
sys/dev/et if_et.c
Log:
SVN rev 199561 on 2009-11-19 22:53:41Z by yongari
Use capability pointer to access PCIe registers rather than
directly access them at fixed address. Frequently the register
offset could be changed if additional PCI capabilities are added to
controller.
One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe
link capabilities register but the location of the register does
not match with PCIe capability pointer + offset. I'm not sure it's
shadow register of PCIe link capabilities register.
Revision Changes Path
1.11 +26 -18 src/sys/dev/et/if_et.c
help
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200911192253.nAJMrwUt073548>
