Date: Tue, 05 Feb 2008 03:45:16 -0700 (MST) From: Warner Losh <imp@bsdimp.com> To: ed@fxq.nl Cc: rrs@FreeBSD.org, perforce@FreeBSD.org Subject: Re: PERFORCE change 134769 for review Message-ID: <20080205.034516.41658341.imp@bsdimp.com> In-Reply-To: <20080205073131.GR1179@hoeg.nl> References: <200802040843.m148htF0037992@repoman.freebsd.org> <20080204.134930.-1350498280.imp@bsdimp.com> <20080205073131.GR1179@hoeg.nl>
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> * M. Warner Losh <imp@bsdimp.com> wrote: > > I don't think you want this change. it is wrong because we don't > > support ISA_MIPS64's notion of 64-bit registers correctly. > > Just tracking the commits a little; you mean that the MIPS port doesn't > yet support 64 bits registers in the CPU context switching code? I mean that it doesn't support saving 64-bit registers when compiled for 32-bit operation. Just adding ISA_MIPS64 doesn't change the fact that the kernel is built with the o32 abi. Most fo the code to support the change is in place, but hasn't been fleshed out in a few key areas. Warner
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