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Date:      Tue, 04 Mar 2003 16:09:17 -0500 (EST)
From:      John Baldwin <jhb@FreeBSD.org>
To:        "Alan L. Cox" <alc@imimic.com>
Cc:        cvs-all@FreeBSD.org, cvs-src@FreeBSD.org, src-committers@FreeBSD.org
Subject:   Re: cvs commit: src/sys/conf options.i386 src/sys/i386/conf NOTE
Message-ID:  <XFMail.20030304160917.jhb@FreeBSD.org>
In-Reply-To: <3E650F02.AA2109F2@imimic.com>

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On 04-Mar-2003 Alan L. Cox wrote:
> John Baldwin wrote:
>> 
>> jhb         2003/03/04 12:24:53 PST
>> 
>>   FreeBSD src repository
>> 
>>   Modified files:
>>     sys/conf             options.i386
>>     sys/i386/conf        NOTES
>>     sys/i386/i386        mp_machdep.c
>>   Log:
>>   Wrap the hyperthreading support code with the HTT kernel option.
>>   Hyperthreading support is now off unless the HTT option is added.
>> 
>>   MFC-after:      3 days
>> 
>>   Revision  Changes    Path
>>   1.185     +1 -0      src/sys/conf/options.i386
>>   1.1078    +1 -0      src/sys/i386/conf/NOTES
>>   1.204     +21 -0     src/sys/i386/i386/mp_machdep.c
> 
> How hard would it be to configure the system so that the 2nd logical CPU
> on a chip did nothing but field interrupts?  Given that interrupts are
> going to pollute the cache and TLB anyway, two of the detrimental
> effects of hyperthreading are already "bought and paid for".

That would be a bit trickier and involve lots of changes to the
I/O APIC stuff.  The other possiblity is to dink with TPR, but
there are some really bad failure modes with using TPR it seems
on some boxes so I'd rather not do that.

-- 

John Baldwin <jhb@FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
"Power Users Use the Power to Serve!"  -  http://www.FreeBSD.org/

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