Date: Tue, 27 Sep 2011 20:42:42 +0300 From: Alexander Motin <mav@FreeBSD.org> To: Adrian Chadd <adrian@freebsd.org> Cc: freebsd-current@freebsd.org Subject: Re: ath / 802.11n performance issues and timer code Message-ID: <4E820B12.9040209@FreeBSD.org> In-Reply-To: <CAJ-VmokL9eLhAm=hVfkWoJZeF5JcXeYLS%2BTkynrqyqV2KDmyYg@mail.gmail.com> References: <CAJ-VmomZyDJV62yCQOvG=UB6H4wfz9=3_cWzEL7vWAA14TCyYA@mail.gmail.com> <201109261053.30410.jhb@freebsd.org> <CAJ-VmomyMQpcpHo4ve-_O67_8VVJW-YRqWeb-7exSxzV5rz_pA@mail.gmail.com> <201109261305.57602.jhb@freebsd.org> <CAJ-Vmo=ZBwBu6Mk=XdY1p18s5=kQvmC3qZc1JzPtpppGBs4Z=Q@mail.gmail.com> <CAJ-Vmong0dJN=t=Qq4%2BaLyBGxEKAKBd8oX4y9P0goux%2BZAc3yA@mail.gmail.com> <CAJ-VmonbAgsNjdCstd_Ap6JBqowD1NX0J5rQ=t9ideaiXTXd%2BA@mail.gmail.com> <4E81E4A1.3070301@FreeBSD.org> <4E81F21D.7000209@FreeBSD.org> <CAJ-VmokL9eLhAm=hVfkWoJZeF5JcXeYLS%2BTkynrqyqV2KDmyYg@mail.gmail.com>
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Adrian Chadd wrote: > On 27 September 2011 23:56, Alexander Motin <mav@freebsd.org> wrote: >>> Yes it does. x86 does the same, but with more details. The general idea >>> of the critical section is to block context switch out of idle thread >>> until missed time events will be handled inside cpu_activeclock(). >> I was wrong. That's not good. I have no idea about mips wait instruction >> semantics, related to disabling interrupts. In x86 semantics proper >> solution is: > > [snip] > > Why is that you've protected the halt/wait part of the idle code > inside a critical section? > > I'm not sure what to do about MIPS Until proper solution found, try this patch. I think it should not harm: --- machdep.c (revision 225796) +++ machdep.c (working copy) @@ -497,7 +497,8 @@ critical_enter(); cpu_idleclock(); } - __asm __volatile ("wait"); + if (!sched_runnable()) + __asm __volatile ("wait"); if (!busy) { cpu_activeclock(); critical_exit(); -- Alexander Motin
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